Patents by Inventor Toshiki Ishii

Toshiki Ishii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050057300
    Abstract: To provide a semiconductor integrated circuit device capable of avoiding noise generation and suppressing occurrence of an erroneous operation. Provided is a current limiting circuit where a current flowing in an output terminal of a charge pump circuit is sensed with a sensing resistor to be detected by a current detecting circuit to thereby cause an input current to constantly flow in an input terminal of the charge pump circuit in an amount approximately twice larger than an output current, whereby a current is kept constant to suppress a peak current and to avoid the noise generation. Consequently, other circuits connected to an input power source shared with the charge pump circuit are kept from erroneously operating.
    Type: Application
    Filed: July 7, 2004
    Publication date: March 17, 2005
    Inventor: Toshiki Ishii
  • Patent number: 6831336
    Abstract: A semiconductor device capable of accurately controlling the current value is provided. In a semiconductor integrated circuit having a constant current circuit, the constant current circuit includes a plurality of constant current elements having a gate terminal and a source terminal in common. Branched drain terminals of the constant current element arranged on one end of the gate terminal and the source terminal are arranged to both the gate terminal and the source terminal.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: December 14, 2004
    Assignee: Seiko Instruments Inc.
    Inventor: Toshiki Ishii
  • Patent number: 6744224
    Abstract: An input voltage detecting circuit for detecting an input voltage is provided inside a PFM control charge pump circuit, and potential differences between potentials appearing at gate terminals and potentials appearing at source terminals are reduced by gate voltage controlling circuits for in response to a signal from the input voltage detecting circuit, suppressing gate voltages of switch transistors of a charge pump to suppress a rush current value to thereby reduce a current to prevent generation of a noise.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: June 1, 2004
    Assignee: Seiko Instruments Inc.
    Inventor: Toshiki Ishii
  • Patent number: 6738272
    Abstract: In a charge pump circuit, a constant current circuit is disposed between an input power supply and an output capacitor, when a power supply is started to turn on, the operation of the charge pump circuit is stopped, and the output capacitor is charged up to a given voltage by the constant current circuit, and thereafter the normal operation of the charge pump is started to limit the rush current. When the power supply is started, the operation is conducted by an oscillator circuit having a small duty ratio, and thereafter the control is replaced by the PFM control having the normal duty ratio, to thereby reduce the rush current as compared with that of the conventional PFM control. When the power supply is started, a pre-driver including a current limiting element is used to drive a driver, resulting in such an advantage that the rush current is reduced as compared with that driven by the conventional pre-driver.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: May 18, 2004
    Assignee: Seiko Instruments Inc.
    Inventors: Junko Yamanaka, Toshiki Ishii, Katsunori Kimura
  • Publication number: 20030151423
    Abstract: An input voltage detecting circuit for detecting an input voltage is provided inside a PFM control charge pump circuit, and potential differences between potentials appearing at gate terminals and potentials appearing at source terminals are reduced by gate voltage controlling circuits for in response to a signal from the input voltage detecting circuit, suppressing gate voltages of switch transistors of a charge pump to suppress a rush current value to thereby reduce a current to prevent generation of a noise.
    Type: Application
    Filed: February 5, 2003
    Publication date: August 14, 2003
    Inventor: Toshiki Ishii
  • Publication number: 20030089955
    Abstract: A semiconductor device capable of accurately controlling the current value is provided. In a semiconductor integrated circuit having a constant current circuit, the constant current circuit includes a plurality of constant current elements having a gate terminal and a source terminal in common. Branched drain terminals of the constant current element arranged on one end of the gate terminal and the source terminal are arranged to both the gate terminal and the source terminal.
    Type: Application
    Filed: November 4, 2002
    Publication date: May 15, 2003
    Inventor: Toshiki Ishii
  • Publication number: 20020154524
    Abstract: In a charge pump circuit, a constant current circuit is disposed between an input power supply and an output capacitor, when a power supply is started to turn on, the operation of the charge pump circuit is stopped, and the output capacitor is charged up to a given voltage by the constant current circuit, and thereafter the normal operation of the charge pump is started to limit the rush current. When the power supply is started, the operation is conducted by an oscillator circuit having a small duty ratio, and thereafter the control is replaced by the PFM control having the normal duty ratio, to thereby reduce the rush current as compared with that of the conventional PFM control. When the power supply is started, a pre-driver including a current limiting element is used to drive a driver, resulting in such an advantage that the rush current is reduced as compared with that driven by the conventional pre-driver.
    Type: Application
    Filed: April 16, 2002
    Publication date: October 24, 2002
    Inventors: Junko Yamanaka, Toshiki Ishii, Katsunori Kimura
  • Patent number: 6154070
    Abstract: To form a means preventing a logic circuit from outputting wrong data at uncontrolled, unstable state of power turn-on in a control circuit. The control circuit has two logic circuits therein and takes negative OR or negative AND of output thereof. A first input terminal is connected to an input of an inverter circuit and a second logic circuit; the output of the inverter circuit is connected to the input of the first logic circuit; a second input terminal is connected to the first logic circuit and the second logic circuit; outputs of the first logic circuit and the second logic circuit are connected to inputs of a gate circuit; the output of the gate circuit is connected to a output terminal; and the first logic circuit and the second logic circuit output the opposite level to each other, positive and negative.
    Type: Grant
    Filed: April 2, 1998
    Date of Patent: November 28, 2000
    Assignee: Seiko Instruments Inc.
    Inventor: Toshiki Ishii