Patents by Inventor Toshiki Makimoto

Toshiki Makimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9219111
    Abstract: A nitride semiconductor structure of the present invention is obtained by growing an h- or t-BN thin film (12) and a wurtzite-structure AlxGa1-xN (x>0) thin film (14) as buffer layers and forming a single-crystal wurtzite-structure AlGaInBN thin film (13) thereon. While GaN, AlGaN, AlN, and the like have the wurtzite structure with sp3 bonds, h-BN or t-BN has the graphite structure with sp2 bonds, and has a completely different crystal structure. Accordingly, it has heretofore not been considered that a wurtzite-structure AlGaInBN thin film can be grown on a graphite-structure h-BN thin film. However, when a wurtzite-structure AlxGa1-xN (x>0) thin film (14) is formed as a buffer layer on a graphite-structure boron nitride thin film (12), a wurtzite-structure AlGaInBN (13) nitride semiconductor structure such as GaN can be grown on the buffer layer.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: December 22, 2015
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Yasuyuki Kobayashi, Kazuhide Kumakura, Tetsuya Akasaka, Toshiki Makimoto
  • Publication number: 20140145147
    Abstract: A nitride semiconductor structure of the present invention is obtained by growing an h- or t-BN thin film (12) and a wurtzite-structure AlxGa1-xN (x>0) thin film (14) as buffer layers and forming a single-crystal wurtzite-structure AlGaInBN thin film (13) thereon. While GaN, AlGaN, AlN, and the like have the wurtzite structure with sp3 bonds, h-BN or t-BN has the graphite structure with sp2 bonds, and has a completely different crystal structure. Accordingly, it has heretofore not been considered that a wurtzite-structure AlGaInBN thin film can be grown on a graphite-structure h-BN thin film. However, when a wurtzite-structure AlxGa1-xN (x>0) thin film (14) is formed as a buffer layer on a graphite-structure boron nitride thin film (12), a wurtzite-structure AlGaInBN (13) nitride semiconductor structure such as GaN can be grown on the buffer layer.
    Type: Application
    Filed: September 5, 2012
    Publication date: May 29, 2014
    Inventors: Yasuyuki Kobayashi, Kazuhide Kumakura, Tetsuya Akasaka, Toshiki Makimoto
  • Patent number: 8486816
    Abstract: An integrated optical waveguide has a first optical waveguide, a second optical waveguide, and a groove. The second optical waveguide is coupled to the first optical waveguide and has a refractive index that is different from the first optical waveguide. The groove is disposed so as to traverse an optical path of the first optical waveguide and is separated from an interface between the first optical waveguide and the second optical waveguide by a predetermined spacing. The spacing from the interface and the width of the groove are determined such that reflection at a boundary between the first optical waveguide and the second optical waveguide is weakened. A semiconductor board may be disposed at a boundary between the first optical waveguide and the second optical waveguide.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: July 16, 2013
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 8487319
    Abstract: An integrated optical waveguide has a first optical waveguide, a second optical waveguide, and a groove. The second optical waveguide is coupled to the first optical waveguide and has a refractive index that is different from the first optical waveguide. The groove is disposed so as to traverse an optical path of the first optical waveguide and is separated from an interface between the first optical waveguide and the second optical waveguide by a predetermined spacing. The spacing from the interface and the width of the groove are determined such that reflection at a boundary between the first optical waveguide and the second optical waveguide is weakened. A semiconductor board may be disposed at a boundary between the first optical waveguide and the second optical waveguide.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: July 16, 2013
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 8328936
    Abstract: A process of producing a diamond thin-film includes implanting dopant into a diamond by an ion implantation technique, forming a protective layer on at least part of the surface of the ion-implanted diamond, and firing the protected ion-implanted diamond at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C. A process of producing a diamond semiconductor includes implanting dopant into each of two diamonds by an ion implantation technique and superimposing the two ion-implanted diamonds on each other such that at least part of the surfaces of each of the ion-implanted diamonds makes contact with each other, and firing the ion implanted diamonds at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: December 11, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 8242511
    Abstract: In a conventional diamond semiconductor element, because of high density of crystal defects, it is impossible to reflect the natural physical properties peculiar to a diamond, such as high thermal conductivity, high breakdown field strength, high-frequency characteristics and the like, in the transistor characteristics. By slightly shifting surface orientation of a diamond substrate in a [001] direction, a significant reduction in crystal defects peculiar to a diamond is possible. The equivalent effects are also provided by shifting surface orientation of a single-crystal diamond thin-film or channel slightly from a [001] direction. It is possible to obtain a significantly high transconductance gm as compared with that in a transistor produced using conventional surface orientation.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: August 14, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 8221548
    Abstract: A process for producing a diamond thin-film includes forming a diamond crystal thin-film on a substrate and firing the diamond crystal thin-film at a sufficient temperature under high pressure under which a diamond is stable. A diamond single-crystal substrate having a diamond single-crystal thin-film formed thereon is placed in an ultra-high-pressure and high-temperature firing furnace to anneal the diamond single-crystal thin-film under the conditions of 1200° C. and 6 GPa.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: July 17, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Publication number: 20120034737
    Abstract: A process of producing a diamond thin-film includes implanting dopant into a diamond by an ion implantation technique, forming a protective layer on at least part of the surface of the ion-implanted diamond, and firing the protected ion-implanted diamond at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C. A process of producing a diamond semiconductor includes implanting dopant into each of two diamonds by an ion implantation technique and superimposing the two ion-implanted diamonds on each other such that at least part of the surfaces of each of the ion-implanted diamonds makes contact with each other, and firing the ion implanted diamonds at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C.
    Type: Application
    Filed: October 18, 2011
    Publication date: February 9, 2012
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 7973339
    Abstract: An integrated optical waveguide has a first optical waveguide, a second optical waveguide, and a groove. The second optical waveguide is coupled to the first optical waveguide and has a refractive index that is different from the first optical waveguide. The groove is disposed so as to traverse an optical path of the first optical waveguide and is separated from an interface between the first optical waveguide and the second optical waveguide by a predetermined spacing. The spacing from the interface and the width of the groove are determined such that reflection at a boundary between the first optical waveguide and the second optical waveguide is weakened. A semiconductor board may be disposed at a boundary between the first optical waveguide and the second optical waveguide.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: July 5, 2011
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Publication number: 20110068352
    Abstract: An integrated optical waveguide has a first optical waveguide, a second optical waveguide, and a groove. The second optical waveguide is coupled to the first optical waveguide and has a refractive index that is different from the first optical waveguide. The groove is disposed so as to traverse an optical path of the first optical waveguide and is separated from an interface between the first optical waveguide and the second optical waveguide by a predetermined spacing. The spacing from the interface and the width of the groove are determined such that reflection at a boundary between the first optical waveguide and the second optical waveguide is weakened. A semiconductor board may be disposed at a boundary between the first optical waveguide and the second optical waveguide.
    Type: Application
    Filed: November 30, 2010
    Publication date: March 24, 2011
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Publication number: 20110070694
    Abstract: An integrated optical waveguide has a first optical waveguide, a second optical waveguide, and a groove. The second optical waveguide is coupled to the first optical waveguide and has a refractive index that is different from the first optical waveguide. The groove is disposed so as to traverse an optical path of the first optical waveguide and is separated from an interface between the first optical waveguide and the second optical waveguide by a predetermined spacing. The spacing from the interface and the width of the groove are determined such that reflection at a boundary between the first optical waveguide and the second optical waveguide is weakened. A semiconductor board may be disposed at a boundary between the first optical waveguide and the second optical waveguide.
    Type: Application
    Filed: November 30, 2010
    Publication date: March 24, 2011
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Publication number: 20100289030
    Abstract: In a conventional diamond semiconductor element, because of high density of crystal defects, it is impossible to reflect the natural physical properties peculiar to a diamond, such as high thermal conductivity, high breakdown field strength, high-frequency characteristics and the like, in the transistor characteristics. By slightly shifting surface orientation of a diamond substrate in a [001] direction, a significant reduction in crystal defects peculiar to a diamond is possible. The equivalent effects are also provided by shifting surface orientation of a single-crystal diamond thin-film or channel slightly from a [001] direction. It is possible to obtain a significantly high transconductance gm as compared with that in a transistor produced using conventional surface orientation.
    Type: Application
    Filed: June 20, 2006
    Publication date: November 18, 2010
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 7804106
    Abstract: A nitride semiconductor structure is provided which greatly improves ohmic characteristics by repairing process damage by regrowing an indium-containing p-type nitride semiconductor on a p-type nitride semiconductor having the process damage. In addition, a nitride semiconductor bipolar transistor is provided which can greatly improve its current gain and offset voltage. The structure includes an indium-containing p-type nitride semiconductor layer on a p-type nitride semiconductor processed by etching. The bipolar transistor, which has a base layer composed of a p-type nitride semiconductor, has an indium-containing p-type InGaN base layer regrown on a surface of a p-type InGaN base layer exposed by etching an emitter layer.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: September 28, 2010
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Toshiki Makimoto, Kazuhide Kumakura, Naoki Kobayashi
  • Publication number: 20090261347
    Abstract: In a conventional diamond semiconductor element, because of high density of crystal defects, it is impossible to reflect the natural physical properties peculiar to a diamond, such as high thermal conductivity, high breakdown field strength, high-frequency characteristics and the like, in the transistor characteristics. By slightly shifting surface orientation of a diamond substrate in a [001] direction, a significant reduction in crystal defects peculiar to a diamond is possible. The equivalent effects are also provided by shifting surface orientation of a single-crystal diamond thin-film or channel slightly from a [001] direction. It is possible to obtain a significantly high transconductance gm as compared with that in a transistor produced using conventional surface orientation.
    Type: Application
    Filed: June 20, 2006
    Publication date: October 22, 2009
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Publication number: 20080217626
    Abstract: An integrated optical waveguide has a first optical waveguide, a second optical waveguide, and a groove. The second optical waveguide is coupled to the first optical waveguide and has a refractive index that is different from the first optical waveguide. The groove is disposed so as to traverse an optical path of the first optical waveguide and is separated from an interface between the first optical waveguide and the second optical waveguide by a predetermined spacing. The spacing from the interface and the width of the groove are determined such that reflection at a boundary between the first optical waveguide and the second optical waveguide is weakened. A semiconductor board may be disposed at a boundary between the first optical waveguide and the second optical waveguide.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 11, 2008
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Publication number: 20080134960
    Abstract: An integrated optical waveguide has a first optical waveguide, a second optical waveguide, and a groove. The second optical waveguide is coupled to the first optical waveguide and has a refractive index that is different from the first optical waveguide. The groove is disposed so as to traverse an optical path of the first optical waveguide and is separated from an interface between the first optical waveguide and the second optical waveguide by a predetermined spacing. The spacing from the interface and the width of the groove are determined such that reflection at a boundary between the first optical waveguide and the second optical waveguide is weakened. A semiconductor board may be disposed at a boundary between the first optical waveguide and the second optical waveguide.
    Type: Application
    Filed: January 31, 2008
    Publication date: June 12, 2008
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Publication number: 20080134959
    Abstract: An integrated optical waveguide has a first optical waveguide, a second optical waveguide, and a groove. The second optical waveguide is coupled to the first optical waveguide and has a refractive index that is different from the first optical waveguide. The groove is disposed so as to traverse an optical path of the first optical waveguide and is separated from an interface between the first optical waveguide and the second optical waveguide by a predetermined spacing. The spacing from the interface and the width of the groove are determined such that reflection at a boundary between the first optical waveguide and the second optical waveguide is weakened. A semiconductor board may be disposed at a boundary between the first optical waveguide and the second optical waveguide.
    Type: Application
    Filed: January 31, 2008
    Publication date: June 12, 2008
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 7244520
    Abstract: A substrate for growth of nitride semiconductor capable of obtaining a high-quality nitride semiconductor crystal layer is provided. A substrate for growth of nitride semiconductor for growth of a nitride semiconductor layer on a sapphire substrate (1) according to one embodiment of the invention is provided with an Al2O3 layer (2) as separately provided on the sapphire substrate (1), an AlON layer (3) which is the first layer, and an AlN layer (4) which is the second layer. With respect to the first layer and the second layer, the AlON layer (3) and the AlN layer (4) are deposited on the Al2O3 layer (2) in this order.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: July 17, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Kazuhide Kumakura, Masanobu Hiroki, Toshiki Makimoto
  • Publication number: 20060051554
    Abstract: A substrate for growth of nitride semiconductor capable of obtaining a high-quality nitride semiconductor crystal layer is provided. A substrate for growth of nitride semiconductor for growth of a nitride semiconductor layer on a sapphire substrate (1) according to one embodiment of the invention is provided with an Al2O3 layer (2) as separately provided on the sapphire substrate (1), an AlON layer (3) which is the first layer, and an AlN layer (4) which is the second layer. With respect to the first layer and the second layer, the AlON layer (3) and the AlN layer (4) are deposited on the Al2O3 layer (2) in this order.
    Type: Application
    Filed: August 11, 2004
    Publication date: March 9, 2006
    Inventors: Kazuhide Kumakura, Masanobu Hiroki, Toshiki Makimoto
  • Publication number: 20050224831
    Abstract: A nitride semiconductor structure is provided which greatly improves ohmic characteristics by repairing process damage by regrowing an indium-containing p-type nitride semiconductor on a p-type nitride semiconductor having the process damage. In addition, a nitride semiconductor bipolar transistor is provided which can greatly improve its current gain and offset voltage. The structure includes an indium-containing p-type nitride semiconductor layer on a p-type nitride semiconductor processed by etching. The bipolar transistor, which has a base layer composed of a p-type nitride semiconductor, has an indium-containing p-type InGaN base layer regrown on a surface of a p-type InGaN base layer exposed by etching an emitter layer.
    Type: Application
    Filed: January 6, 2004
    Publication date: October 13, 2005
    Inventors: Toshiki Makimoto, Kazuhide Kumakura, Naoki Kobayashi