Patents by Inventor Toshiki Matsukawa

Toshiki Matsukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7772961
    Abstract: A chip-shaped electronic part includes: a substrate; a pair of upper surface electrodes formed on an upper surface of the substrate; a functional element formed to be electrically connected to the upper surface electrode pair; a pair of lower surface electrodes formed on a lower surface of the substrate at positions opposing the upper surface electrode pair; a pair of end surface electrodes formed on end surfaces of the substrate so that each of the end surface electrode pair is electrically connected to one of the upper surface electrode pair, and to one of the lower surface electrode pair corresponding to the one upper surface electrode; a protective film formed in such a manner as to cover at least the functional element; and a plated layer formed in such a manner as to cover at least each of the upper surface electrode pair, wherein the protective film or the plated layer has at least two points of application at which a load from above the substrate is exerted.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: August 10, 2010
    Assignee: Panasonic Corporation
    Inventors: Yasuharu Kinoshita, Toshiki Matsukawa, Naoki Shibuya, Shoji Hoshitoku
  • Publication number: 20080094169
    Abstract: A chip-shaped electronic part includes: a substrate; a pair of upper surface electrodes formed on an upper surface of the substrate; a functional element formed to be electrically connected to the upper surface electrode pair; a pair of lower surface electrodes formed on a lower surface of the substrate at positions opposing the upper surface electrode pair; a pair of end surface electrodes formed on end surfaces of the substrate so that each of the end surface electrode pair is electrically connected to one of the upper surface electrode pair, and to one of the lower surface electrode pair corresponding to the one upper surface electrode; a protective film formed in such a manner as to cover at least the functional element; and a plated layer formed in such a manner as to cover at least each of the upper surface electrode pair, wherein the protective film or the plated layer has at least two points of application at which a load from above the substrate is exerted.
    Type: Application
    Filed: September 9, 2005
    Publication date: April 24, 2008
    Inventors: Yasuharu Kinoshita, Toshiki Matsukawa, Naoki Shibuya, Shoji Hoshitoku
  • Patent number: 7334318
    Abstract: A method of manufacturing an inexpensive fine resistor which do not require dimensional classifications of discrete substrates is disclosed. The method eliminates a process of replacing a mask according to a dimensional ranking of each discrete substrate. The method includes: dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; forming a top electrode layer on a top face of the discrete substrate; forming a resistor layer such that a part of the resistor layer overlaps the top electrode layer; forming protective layers so as to cover the resistor layer; and forming side electrode layer on a side face of the discrete substrate such that the side electrode layer is electrically coupled to the top electrode layer.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: February 26, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Patent number: 7237324
    Abstract: A multiple chip resistor is manufactured in the following method. First electrode layers are formed on a first surface of a substrate. Resistor elements electrically connected to the first electrode layers, respectively, are formed on the first surface of the substrate. Slits are formed in the substrate for separating the first electrode layers. Edge electrodes connected to the first electrode layers at the edges of the slits, respectively, are formed on respective edges at the slits of the substrate. The substrate is divided at the slits into strip substrates. Portions of the edge electrodes are removed for electrically isolating the resistor elements from each other. The method provides the edge electrodes on each strip substrate with an improved dimensional accuracy, hence allowing the edge electrodes to be isolated electrically from each other. Consequently, the multiple chip resistor is prevented from being mounted defectively when the resistor is surface-mounted.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: July 3, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiki Matsukawa, Yasuharu Kinoshita, Shoji Hoshitoku, Masaharu Takahashi, Yoshinori Ando
  • Patent number: 7188404
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: March 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Patent number: 7165315
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: January 23, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Patent number: 7071843
    Abstract: A navigation system and navigation equipment which reduce the time required for radio transmissions to implement fast navigational guidance. The navigation equipment communicates bi-directionally by radio with a navigation server, thereby providing navigational guidance. The navigation equipment transmits position data delivered by a GPS receiver to the navigation server through a communication device and acquires, from the communication device, map data for display indicative of a map of a surrounding area including a self-location provided by the position data sent back from the navigation server.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: July 4, 2006
    Assignee: Pioneer Corporation
    Inventors: Masaya Hashida, Toshiki Matsukawa, Mayumi Naganuma
  • Patent number: 7057490
    Abstract: A resistor having reliability in electrical connection between an upper surface electrode and a side face electrode, and in bonding strength between a first thin film and a second thin film is provided. The resistor includes upper surface electrodes formed on a main surface a substrate and side face electrodes disposed to side faces of the substrate and connected electrically to the pair of upper surface electrodes, respectively. The upper surface electrode includes a first upper surface electrode layer and a bonding layer overlying the first upper surface electrode layer. The side face electrode includes a first thin film disposed to a side face of the substrate, a second thin film composed of copper-base alloy film and connected electrically to the first thin film, a first plating film formed by nickel plating for covering the second thin film, and a second plating film covering the first plating film.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: June 6, 2006
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Masato Hashimoto, Akio Fukuoka, Toshiki Matsukawa, Hiroyuki Saikawa, Tsutomu Nakanishi
  • Patent number: 6935016
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: August 30, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Publication number: 20050158960
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
    Type: Application
    Filed: January 18, 2005
    Publication date: July 21, 2005
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Publication number: 20050153515
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
    Type: Application
    Filed: January 18, 2005
    Publication date: July 14, 2005
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Publication number: 20050125991
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
    Type: Application
    Filed: January 18, 2005
    Publication date: June 16, 2005
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Publication number: 20040113750
    Abstract: A multiple chip resistor is manufactured in the following method. First electrode layers are formed on a first surface of a substrate. Resistor elements electrically connected to the first electrode layers, respectively, are formed on the first surface of the substrate. Slits are formed in the substrate for separating the first electrode layers. Edge electrodes connected to the first electrode layers at the edges of the slits, respectively, are formed on respective edges at the slits of the substrate. The substrate is divided at the slits into strip substrates. Portions of the edge electrodes are removed for electrically isolating the resistor elements from each other. The method provides the edge electrodes on each strip substrate with an improved dimensional accuracy, hence allowing the edge electrodes to be isolated electrically from each other. Consequently, the multiple chip resistor is prevented from being mounted defectively when the resistor is surface-mounted.
    Type: Application
    Filed: October 9, 2003
    Publication date: June 17, 2004
    Inventors: Toshiki Matsukawa, Yasuharu Kinoshita, Shoji Hoshitoku, Masaharu Takashi, Yoshinori Ando
  • Publication number: 20040027234
    Abstract: A resistor having reliability in electrical connection between an upper surface electrode and a side face electrode, and in bonding strength between a first thin film and a second thin film is provided. The resistor includes upper surface electrodes formed on a main surface a substrate and side face electrodes disposed to side faces of the substrate and connected electrically to the pair of upper surface electrodes, respectively. The upper surface electrode includes a first upper surface electrode layer and a bonding layer overlying the first upper surface electrode layer. The side face electrode includes a first thin film disposed to a side face of the substrate, a second thin film composed of copper-base alloy film and connected electrically to the first thin film, a first plating film formed by nickel plating for covering the second thin film, and a second plating film covering the first plating film.
    Type: Application
    Filed: August 5, 2003
    Publication date: February 12, 2004
    Inventors: Masato Hashimoto, Akio Fukuoka, Toshiki Matsukawa, Hiroyuki Saikawa, Tsutomu Nakanishi
  • Publication number: 20030201912
    Abstract: A navigation system and navigation equipment which reduce the time required for radio transmissions to implement fast navigational guidance. The navigation equipment communicates bi-directionally by radio with a navigation server, thereby providing navigational guidance. The navigation equipment transmits position data delivered by a GPS receiver to the navigation server through a communication device and acquires, from the communication device, map data for display indicative of a map of a surrounding area including a self-location provided by the position data sent back from the navigation server.
    Type: Application
    Filed: April 24, 2003
    Publication date: October 30, 2003
    Applicant: Pioneer Corporation
    Inventors: Masaya Hashida, Toshiki Matsukawa, Mayumi Naganuma
  • Publication number: 20030132828
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate (11) made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer (12) formed on a top face of discrete substrate (11); resistor layer (13) formed such that a part of resistor layer (13) overlaps top electrode layer (12); protective layers (14, 16) formed so as to cover resistor layer (13); side electrode layer (17) formed on a side face of discrete substrate (11) such that side electrode layer is electrically coupled to top electrode layer (12).
    Type: Application
    Filed: October 22, 2002
    Publication date: July 17, 2003
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase