Patents by Inventor Toshiki Miyake

Toshiki Miyake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11242776
    Abstract: A valve open-close timing control device includes a driving rotator, a driven rotator, a phase adjusting mechanism, a sensor unit, a storage configured to store the plurality of divided regions consecutively provided, as a plurality of divided length information pieces corresponding to divided lengths of the divided regions, and an actual phase acquisition unit configured to start acquisition of the crank angle signal and the cam angle signal along with start of actuation control of actuating the internal combustion engine, specify one of the divided regions by referring to the divided length information pieces stored in the storage in accordance with the crank angle signal at timing set in accordance with the cam angle signal, and acquire the relative rotation phase as an actual phase in accordance with the crank angle signal corresponding to the boundary of the divided region thus specified and the reference crank angle signal.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: February 8, 2022
    Assignee: AISIN CORPORATION
    Inventors: Takashi Iwaya, Masahiro Okado, Toi Suzuki, Toshiki Miyake, Takano Nakai, Kenichiro Suzuki, Yoshiyuki Kamoyama, Toru Hirota
  • Publication number: 20220003133
    Abstract: A valve open-close timing control device includes a driving rotator, a driven rotator, a phase adjusting mechanism, a sensor unit, a storage configured to store the plurality of divided regions consecutively provided, as a plurality of divided length information pieces corresponding to divided lengths of the divided regions, and an actual phase acquisition unit configured to start acquisition of the crank angle signal and the cam angle signal along with start of actuation control of actuating the internal combustion engine, specify one of the divided regions by referring to the divided length information pieces stored in the storage in accordance with the crank angle signal at timing set in accordance with the cam angle signal, and acquire the relative rotation phase as an actual phase in accordance with the crank angle signal corresponding to the boundary of the divided region thus specified and the reference crank angle signal.
    Type: Application
    Filed: March 18, 2021
    Publication date: January 6, 2022
    Applicant: AISIN SEIKI KABUSHIKI KAISHA
    Inventors: Takashi IWAYA, Masahiro OKADO, Toi SUZUKI, Toshiki MIYAKE, Takano NAKAI, Kenichiro SUZUKI, Yoshiyuki KAMOYAMA, Toru HIROTA
  • Publication number: 20160254155
    Abstract: A protection film is formed on a semiconductor substrate. Impurity ions are implanted into the semiconductor substrate through the protection film. The impurity is activated to form an impurity layer. The protection film is removed after forming the impurity layer. The semiconductor substrate of a surface portion of the impurity layer is removed after removing the protection film. A semiconductor layer is epitaxially grown above the semiconductor substrate after removing the semiconductor substrate of the surface portion of the impurity layer.
    Type: Application
    Filed: May 13, 2016
    Publication date: September 1, 2016
    Inventors: Taiji Ema, Toshifumi Mori, Toshiki Miyake, Kenichi Okabe
  • Patent number: 8858818
    Abstract: The effects of knock-on oxide in a semiconductor substrate are reduced by providing a semiconductor substrate and forming a thin layer of native oxide on the semiconductor substrate. Ion implantation is performed through the native oxide layer. The native oxide layer reduces the phenomenon of knock-on oxide and oxygen concentration within the semiconductor substrate. Further reduction may be achieved by etching the surface of the semiconductor substrate in order to eliminate a concentration of oxygen at a surface of the semiconductor substrate.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: October 14, 2014
    Assignee: SuVolta, Inc.
    Inventors: Pushkar Ranade, Toshifumi Mori, Ken-ichi Okabe, Toshiki Miyake
  • Publication number: 20120083087
    Abstract: A protection film is formed on a semiconductor substrate. Impurity ions are implanted into the semiconductor substrate through the protection film. The impurity is activated to form an impurity layer. The protection film is removed after forming the impurity layer. The semiconductor substrate of a surface portion of the impurity layer is removed after removing the protection film. A semiconductor layer is epitaxially grown above the semiconductor substrate after removing the semiconductor substrate of the surface portion of the impurity layer.
    Type: Application
    Filed: June 29, 2011
    Publication date: April 5, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Taiji Ema, Toshifumi Mori, Toshiki Miyake, Kenichi Okabe
  • Publication number: 20120083132
    Abstract: The effects of knock-on oxide in a semiconductor substrate are reduced by providing a semiconductor substrate and forming a thin layer of native oxide on the semiconductor substrate. Ion implantation is performed through the native oxide layer. The native oxide layer reduces the phenomenon of knock-on oxide and oxygen concentration within the semiconductor substrate. Further reduction may be achieved by etching the surface of the semiconductor substrate in order to eliminate a concentration of oxygen at a surface of the semiconductor substrate.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 5, 2012
    Inventors: Pushkar Ranade, Toshifumi Mori, Ken-ichi Okabe, Toshiki Miyake
  • Patent number: 6709959
    Abstract: A semiconductor device is fabricated by introducing an impurity element into a Si substrate by an ion implantation process with an energy set such that the depth of a junction formed in the Si substrate by the impurity element is less than about 50 nm, and then annealing the substrate, wherein the method further includes a step of removing an oxide film from a surface of the Si substrate before the step of ion implantation process.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: March 23, 2004
    Assignee: Fujitsu Limited
    Inventors: Masataka Kase, Toshiki Miyake, Mitsuaki Hori, Kenichi Hikazutani, Manabu Nakamura, Takayuki Wada, Yoshikazu Kataoka
  • Publication number: 20020177289
    Abstract: A semiconductor device is fabricated by introducing an impurity element into a Si substrate by an ion implantation process with an energy set such that the depth of a junction formed in the Si substrate by the impurity element is less than about 50 nm, and then annealing the substrate, wherein the method further includes a step of removing an oxide film from a surface of the Si substrate before the step of ion implantation process.
    Type: Application
    Filed: December 28, 1999
    Publication date: November 28, 2002
    Inventors: MASATAKA KASE, TOSHIKI MIYAKE, MITSUAKI HORI, KENICHI HIKAZUTANI, MANABU NAKAMURA, TAKAYUKI WADA, YOSHIKAZU KATAOKA