Patents by Inventor Toshiki Miyane

Toshiki Miyane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6333951
    Abstract: The present invention provides an image decoding and reconstruction system for successively reading out and decoding compression video data constituting one screen page and reconstructing an image with a memory of a small capacity. The system of the invention divides an image of one screen page into 8x8-pixel blocks, compresses video data by discrete cosine transform, successively reads data in the unit of a 2×2 matrix of the 8×8-pixel blocks, and stores the video data along horizontal scanning lines in one of two memories while reading other video data previously stored along the scanning lines out of the other memory. The invention also provides an interblock distortion removal filter for eliminating interblock distortions due to orthogonal transform.
    Type: Grant
    Filed: February 7, 1997
    Date of Patent: December 25, 2001
    Assignee: Seiko Epson Corporation
    Inventors: Tsuyoshi Tamura, Toshiki Miyane, Teruhisa Ishikawa
  • Patent number: 5801776
    Abstract: The present invention provides an image decoding and reconstruction system for successively reading out and decoding compression video data constituting one screen page and reconstructing an image with a memory of a small capacity. The system of the invention divides an image of one screen page into 8.times.8-pixel blocks, compresses video data by discrete cosine transform, successively reads data in the unit of a 2.times.2 matrix of the 8.times.8-pixel blocks, and stores the video data along horizontal scanning lines in one of two memories while reading other video data previously stored along the scanning lines out of the other memory. The invention also provides an interblock distortion removal filter for eliminating interblock distortions due to orthogonal transform.
    Type: Grant
    Filed: March 16, 1995
    Date of Patent: September 1, 1998
    Assignee: Seiko Epson Corporation
    Inventors: Tsuyoshi Tamura, Toshiki Miyane, Teruhisa Ishikawa
  • Patent number: 5621466
    Abstract: The compressed image data ZZ includes code data representing a quantization level coefficient QCx inserted between block data units. DCT coefficients QF(u,v) and a quantization level coefficient QCx, which are decoded form the compressed image data ZZ, are multiplied in the inverse quantization table generator 250 to generate a quantization table QT, and the inverse quantization unit 250 executes inverse quantization with the quantization table QT. Since the quantization level coefficient QCx is inserted between block data units in the compressed image data, the quantization table QT is renewed every time when a new quantization level coefficient QCx is decoded. The compressed image data also includes a special type of data, or null run data, representing a series of pixel blocks having an identical image pattern.
    Type: Grant
    Filed: January 30, 1996
    Date of Patent: April 15, 1997
    Assignee: Seiko Epson Corporation
    Inventors: Toshiki Miyane, Uichi Sekimoto
  • Patent number: 5553260
    Abstract: A data expansion apparatus that performs data expansion operation for a data block unit in a constant period of time is provided. First and second memory devices are first initialized by storing zeroes at all of their addresses. Numeric data and number-of-zeroes data (i.e., data representing the number of successive zeroes) are input to the data expansion apparatus. A calculation circuit outputs a calculated value by combining the number-of-zeroes data, a previous calculated value and 1 together. A first selection circuit associated with the first memory device selects the calculated value and numeric data and output them to the first memory device for storing the numeric data at the address specified by the calculated value. This operation is then repeated. After the first memory device completes the expansion operation, it is switched to perform read operation and the second memory device begins to perform expansion operation through second selection circuit in a similar manner.
    Type: Grant
    Filed: June 1, 1993
    Date of Patent: September 3, 1996
    Assignee: Seiko Epson Corporation
    Inventor: Toshiki Miyane