Patents by Inventor Toshiki Sakamoto
Toshiki Sakamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240391111Abstract: A manipulation system includes: a manipulator for manipulating a sample; a manipulator drive mechanism for moving the manipulator; an imaging apparatus for imaging the sample through an objective lens; a control apparatus that generates force information indicating a magnitude of a force sensation presented to a user, based on an image captured by the imaging apparatus; and a force sensation presentation apparatus configured to receive an input operation from the user for designating a position of the manipulator and to present a force sensation according to the force information generated by the control apparatus to the user.Type: ApplicationFiled: August 24, 2022Publication date: November 28, 2024Inventors: Tadayoshi AOYAMA, Toshiki FUJISHIRO, Kazuya SAKAMOTO, Yuki FUNABORA, Sumiwa SAITO
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Publication number: 20240359097Abstract: A non-transitory computer readable medium stores a program for causing a computer to carry out: processing for making it possible to register a plurality of items of reservation selection information each indicating a specific option selected by a player from among specific options included in a plurality of options presented in a prescribed game; processing for proceeding with the prescribed game, including processing for presenting the plurality of options in the prescribed game and processing for updating a parameter on the basis of the option selected by the player from among the plurality of options presented in the prescribed game; and processing for acquiring the registered reservation selection information and making it possible to identify, on the basis of the reservation selection information acquired, the specific option included in the reservation selection information during the prescribed game.Type: ApplicationFiled: June 26, 2024Publication date: October 31, 2024Applicant: CYGAMES, INC.Inventors: Kenta Toyofuku, Yusuke Takeda, Toshiki Sakamoto, Yujiro Deguchi, Yuka Tanaka
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Patent number: 12119407Abstract: A semiconductor device includes a gate electrode on a substrate, a gate insulating film on the gate electrode, an oxide semiconductor film via the gate insulating film on the gate electrode, a source electrode and a drain electrode on the oxide semiconductor film, a protective film provided on the source electrode and the drain electrode; and a conductive layer provided on the protective film and overlapped on the oxide semiconductor layer. The protective film includes a first silicon oxide film and a first silicon nitride film. The first oxide film is in contact with the oxide semiconductor layer. The gate insulating film includes a second silicon nitride film and a second silicon oxide film. The second silicon oxide film is in contact with the oxide semiconductor layer. The oxide semiconductor layer has a first region located between the source electrode and the drain electrode in a plan view.Type: GrantFiled: February 1, 2023Date of Patent: October 15, 2024Assignee: Japan Display Inc.Inventors: Masashi Tsubuku, Michiaki Sakamoto, Takashi Okada, Toshiki Kaneko, Tatsuya Toda
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Publication number: 20240316464Abstract: A non-transitory computer readable medium stores a program causing a computer to execute: a process for deciding places for a plurality of ranking objects tied to player information of a plurality of players who have played a predetermined game, based on at least one result of the predetermined game; a process for allowing a second player different from a first player to organize, in a deck, a game medium tied to player information of the first player, the ranking object of the first player being in a predetermined place; and a process for executing a game on the basis of an operation made by the second player by using the deck in which the game medium is organized.Type: ApplicationFiled: June 7, 2024Publication date: September 26, 2024Applicant: CYGAMES, INC.Inventors: Hironori Sato, Nichi Otsu, Toshiki Sakamoto, Tetsu Izawa, Mitsuharu Isojima, Yuka Tanaka
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Publication number: 20240186352Abstract: Provided is an imaging device capable of suppressing an influence of flare. An imaging device according to the present disclosure includes: a pixel region in which a plurality of pixels that performs photoelectric conversion is arranged; an on-chip lens provided on the pixel region; a protective member provided on the on-chip lens; and a resin layer that adheres between the on-chip lens and the protective member, in which when a thickness of the resin layer and the protective member is T, a length of a diagonal line of the pixel region viewed from an incident direction of light is L, and a critical angle of the protective member is ?c, T?L/2/tan?c (Formula 2) or T?L/4/tan?c (Formula 3) is satisfied.Type: ApplicationFiled: February 9, 2022Publication date: June 6, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yoshiaki MASUDA, Keisuke HATANO, Hirokazu SEKI, Atsushi TODA, Shinichiro NOUDO, Yusuke OIKE, Yutaka OOKA, Naoto SASAKI, Toshiki SAKAMOTO, Takafumi MORIKAWA
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Publication number: 20230230986Abstract: A solid-state imaging element according to the present disclosure includes a first light receiving pixel, a second light receiving pixel, and a metal layer. The first light receiving pixel receives visible light. The second light receiving pixel receives infrared light. The metal layer is provided to face at least one of a photoelectric conversion unit of the first light receiving pixel and a photoelectric conversion unit of the second light receiving pixel on an opposite side of a light incident side, and contains tungsten as a main component.Type: ApplicationFiled: April 14, 2021Publication date: July 20, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yoshiaki MASUDA, Kazuyoshi YAMASHITA, Shinichiro KURIHARA, Syogo KUROGI, Yusuke UESAKA, Toshiki SAKAMOTO, Hiroyuki KAWANO, Masatoshi IWAMOTO, Takashi TERADA, Sintaro NAKAJIKI, Shinta KOBAYASHI, Chihiro ARAI
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Publication number: 20230215901Abstract: A solid-state imaging element that includes a semiconductor layer, a floating diffusion region (FD), a penetrating pixel separation region, and a non-penetrating pixel separation region. In the semiconductor layer, a visible-light pixel (PDc) that receives visible light and an infrared-light pixel (PDw) that receives infrared light are two-dimensionally arranged. The floating diffusion region is provided in the semiconductor layer and is shared by adjacent visible-light and infrared-light pixels. The penetrating pixel separation region is provided in a region excluding a region corresponding to the floating diffusion region in an inter-pixel region of the visible-light pixel and the infrared-light pixel, and penetrates the semiconductor layer in a depth direction.Type: ApplicationFiled: April 12, 2021Publication date: July 6, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Kazuyoshi YAMASHITA, Yoshiaki MASUDA, Shinichiro KURIHARA, Syogo KUROGI, Yusuke UESAKA, Toshiki SAKAMOTO, Hiroyuki KAWANO, Masatoshi IWAMOTO, Takashi TERADA, Sintaro NAKAJIKI
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Publication number: 20230197748Abstract: The solid-state imaging element includes a plurality of first light receiving pixels that receives visible light, a plurality of second light receiving pixels that receives infrared light, a separation region, and a light shielding wall. The plurality of first light receiving pixels and the plurality of second light receiving pixels are arranged in a matrix, and the separation regionis arranged in a lattice pattern, light and has a plurality of intersection portions The light shielding wall is provided in the separation region and includes a first light shielding wall provided along a first direction in plan view, and a second light shielding wall provided along a second direction intersecting the first direction in plan view. In addition, the first light shielding wall and the second light shielding wall are spaced apart at the intersection portionof at least a part of the separation region.Type: ApplicationFiled: April 13, 2021Publication date: June 22, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yusuke UESAKA, Kazuyoshi YAMASHITA, Yoshiaki MASUDA, Shinichiro KURIHARA, Syogo KUROGI, Toshiki SAKAMOTO, Hiroyuki KAWANO, Masatoshi IWAMOTO, Takashi TERADA, Sintaro NAKAJIKI
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Publication number: 20220232151Abstract: Pixel formation in an imaging element configured to detect image plane phase difference is simplified. The imaging element includes an on-chip lens, a plurality of photoelectric conversion portions, and a plurality of waveguides. The on-chip lens concentrates incident light on a pixel and is placed on each pixel so as to be shifted from a center of the pixel according to an incident angle of the incident light. The plurality of photoelectric conversion portions is arranged in the pixel and performs photoelectric conversion according to the incident light. The plurality of waveguides is arranged for the plurality of respective photoelectric conversion portion in the pixel. The plurality of waveguides guide the incident light concentrated so that the incident light enters each of the plurality of photoelectric conversion portion, and are formed into shapes dissimilar to each other based on the shift of the on-chip lens.Type: ApplicationFiled: April 8, 2022Publication date: July 21, 2022Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Toshiki SAKAMOTO
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Patent number: 11330158Abstract: Pixel formation in an imaging element configured to detect image plane phase difference is simplified. The imaging element includes an on-chip lens, a plurality of photoelectric conversion portions, and a plurality of waveguides. The on-chip lens concentrates incident light on a pixel and is placed on each pixel so as to be shifted from a center of the pixel according to an incident angle of the incident light. The plurality of photoelectric conversion portions is arranged in the pixel and performs photoelectric conversion according to the incident light. The plurality of waveguides is arranged for the plurality of respective photoelectric conversion portion in the pixel. The plurality of waveguides guide the incident light concentrated so that the incident light enters each of the plurality of photoelectric conversion portion, and are formed into shapes dissimilar to each other based on the shift of the on-chip lens.Type: GrantFiled: July 25, 2018Date of Patent: May 10, 2022Assignee: Sony Semiconductor Solutions CorporationInventor: Toshiki Sakamoto
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Publication number: 20200213488Abstract: Pixel formation in an imaging element configured to detect image plane phase difference is simplified. The imaging element includes an on-chip lens, a plurality of photoelectric conversion portions, and a plurality of waveguides. The on-chip lens concentrates incident light on a pixel and is placed on each pixel so as to be shifted from a center of the pixel according to an incident angle of the incident light. The plurality of photoelectric conversion portions is arranged in the pixel and performs photoelectric conversion according to the incident light. The plurality of waveguides is arranged for the plurality of respective photoelectric conversion portion in the pixel. The plurality of waveguides guide the incident light concentrated so that the incident light enters each of the plurality of photoelectric conversion portion, and are formed into shapes dissimilar to each other based on the shift of the on-chip lens.Type: ApplicationFiled: July 25, 2018Publication date: July 2, 2020Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Toshiki SAKAMOTO
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Patent number: 9166432Abstract: A charge circuit includes a current limiting circuit configured to limit a current input from an input terminal; a first transistor connected between an output terminal of the current limiting circuit and a secondary battery; a charge control circuit configured to turn the first transistor on and off to start and stop supply of a charge current to the secondary battery; a second transistor configured to output a current proportional to the charge current flowing through the first transistor; and a charge timer configured to generate clock pulses according to the current output from the second transistor. The charge control circuit is configured to turn off the first transistor to stop the supply of the charge current to the secondary battery when the number of the clock pulses reaches a predetermined number.Type: GrantFiled: February 1, 2013Date of Patent: October 20, 2015Assignee: MITSUMI ELECTRIC CO., LTD.Inventors: Gentaro Kurokawa, Daisuke Suzuki, Toshiki Sakamoto
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Publication number: 20130207597Abstract: A charge circuit includes a current limiting circuit configured to limit a current input from an input terminal; a first transistor connected between an output terminal of the current limiting circuit and a secondary battery; a charge control circuit configured to turn the first transistor on and off to start and stop supply of a charge current to the secondary battery; a second transistor configured to output a current proportional to the charge current flowing through the first transistor; and a charge timer configured to generate clock pulses according to the current output from the second transistor. The charge control circuit is configured to turn off the first transistor to stop the supply of the charge current to the secondary battery when the number of the clock pulses reaches a predetermined number.Type: ApplicationFiled: February 1, 2013Publication date: August 15, 2013Applicant: MITSUMI ELECTRIC CO., LTD.Inventors: Gentaro KUROKAWA, Daisuke Suzuki, Toshiki Sakamoto
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Patent number: 6979136Abstract: The present invention relates a fiber optical module. A first filter 5 transmits a light with a first predetermined wavelength (?A ), and reflects lights with a second predetermined wavelength (?B) and a third predetermined wavelength (?C). A second filter 6 transmits the light with wavelength ?B and reflects the light with wavelength ?C. A first light-receiving device 2 receives the light with wavelength ?A, and a second light-receiving device 3 receives the light with wavelength ?B, A light-emitting device 4 emits the light with wavelength ?C. A first optical fiber 1a leads the lights with wavelengths ?A and ?B to the first filter 5. A second optical fiber 1b leads the light with wavelength ?B reflected by the first filter 1a. A third optical fiber 1c leads the light with wavelength ?C emitted by the light-emitting device 4 to the second filter 6.Type: GrantFiled: May 23, 2003Date of Patent: December 27, 2005Assignee: Okano Electric Wire Co., Ltd.Inventors: Seiji Takagi, Noboru Fukushima, Chohei Hirano, Toshiki Sakamoto
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Publication number: 20040028353Abstract: The present invention relates a fiber optical module. A first filter 5 transmits a light with a first predetermined wavelength (&lgr;A), and reflects lights with a second predetermined wavelength (&lgr;B) and a third predetermined wavelength (&lgr;C). A second filter 6 transmits the light with wavelength &lgr;B and reflects the light with wavelength &lgr;C. A first light-receiving device 2 receives the light with wavelength &lgr;A, and a second light-receiving device 3 receives the light with wavelength &lgr;B, A light-emitting device 4 emits the light with wavelength &lgr;C. A first optical fiber 1a leads the lights with wavelengths &lgr;A and &lgr;B to the first filter 5. A second optical fiber 1b leads the light with wavelength &lgr;B reflected by the first filter 1a. A third optical fiber 1c leads the light with wavelength &lgr;C emitted by the light-emitting device 4 to the second filter 6.Type: ApplicationFiled: May 23, 2003Publication date: February 12, 2004Inventors: Seiji Takagi, Noboru Fukushima, Chohei Hirano, Toshiki Sakamoto