Patents by Inventor Toshimasa Kobayashi

Toshimasa Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020060828
    Abstract: An air dynamic pressure bearing includes a shaft element, a bearing element relatively rotatably supporting the shaft element, and dynamic pressure generation grooves for generating a dynamic pressure by air formed between opposing surfaces of the shaft element and the bearing element. The bearing element is formed from a sintered alloy, and a solid lubricant material is disposed on the opposing surface of at least one of the shaft element and the bearing element.
    Type: Application
    Filed: October 3, 2001
    Publication date: May 23, 2002
    Inventors: Yutaka Ishizuka, Hisaya Nakagawa, Michiaki Takizawa, Takafumi Kuwazawa, Toshimasa Kobayashi, Akitoshi Iizawa, Masao Takemura
  • Patent number: 6281032
    Abstract: In a semiconductor device manufacturing method capable of manufacturing semiconductor lasers, light emitting diodes or electron transport devices using nitride III-V compound semiconductors with a high productivity, a GaN semiconductor laser wafer is prepared in which a plurality of semiconductor lasers are formed on an AlGaInN semiconductor layer on a c-face sapphire substrate and separated from each other by grooves deep enough to reach the c-face sapphire substrate, and a p-side electrode and an n-side electrode are formed in each semiconductor laser. The GaN semiconductor laser wafer is bonded to a photo-diode built-in Si wafer having formed a photo diode for monitoring light outputs and solder electrodes in each pellet by positioning the p-side electrode and the n-side electrode in alignment with the solder electrodes, respectively.
    Type: Grant
    Filed: April 14, 1999
    Date of Patent: August 28, 2001
    Assignee: Sony Corporation
    Inventors: Osamu Matsuda, Toshimasa Kobayashi, Norikazu Nakayama, Hiroji Kawai
  • Patent number: 6278173
    Abstract: It is intended to provide a semiconductor device, its manufacturing method and substrate for manufacturing the semiconductor device which ensures that good cleavable surfaces be made stably in a semiconductor layer under precise control upon making edges of cleaves surfaces in the semiconductor layer stacked on a substrate even when the substrate is non-cleavable, difficult to cleave or different in cleavable orientation from the semiconductor layer. A semiconductor layer 2 made of III-V compound semiconductors is stacked to form a laser structure on a sapphire substrate 1.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: August 21, 2001
    Assignee: Sony Corporation
    Inventors: Toshimasa Kobayashi, Tsuyoshi Tojo
  • Publication number: 20010013608
    Abstract: It is intended to provide a semiconductor device, its manufacturing method and substrate for manufacturing the semiconductor device which ensures that good cleavable surfaces be made stably in a semiconductor layer under precise control upon making edges of cleaves surfaces in the semiconductor layer stacked on a substrate even when the substrate is non-cleavable, difficult to cleave or different in cleavable orientation from the semiconductor layer. A semiconductor layer 2 made of III-V compound semiconductors is stacked to form a laser structure on a sapphire substrate 1.
    Type: Application
    Filed: April 23, 2001
    Publication date: August 16, 2001
    Inventors: Toshimasa Kobayashi, Tsuyoshi Tojo
  • Patent number: 6064082
    Abstract: A heterojunction field effect transistor realizing a high performance by a significant decrease. in source resistance while maintaining a sufficiently high gate resistivity to voltage is provided. Sequentially stacked on a c-face sapphire substrate via a buffer layer are an undoped GaN layer, undoped Al.sub.0.3 Ga.sub.07 N layer, undoped GaN channel layer, undoped Al.sub.0.15 Ga.sub.0.85 N spacer layer, n-type Al.sub.0.15 Ga.sub.0.85 N electron supply layer, graded undoped Al.sub.z Ga.sub.1-z N barrier layer and n-type Al.sub.0.06 Ga.sub.0.94 N contact layer, and a gate electrode, source electrode and drain electrode are formed on the n-type Al.sub.0.06 Ga.sub.0.94 N contact layer to form a AlGaN/GaN HEMT. The Al composition z in the graded undoped Al.sub.z Ga.sub.1-z N barrier layer continuously decreases from 0.15 to 0.06, for example, from the n-type Al.sub.0.15 Ga.sub.0.85 N electron supply layer toward the n-type Al.sub.0.06 Ga.sub.0.94 N contact layer. An n.sup.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: May 16, 2000
    Assignee: Sony Corporation
    Inventors: Hiroji Kawai, Shunji Imanaga, Toshimasa Kobayashi
  • Patent number: 6025213
    Abstract: A surface-emission semiconductor light-emitting device package can radiate heat from the front surface while emitting light to the front surface of the device. The package includes a semiconductor light-emitting device for emitting light to a semiconductor substrate in the upper direction and a package window portion formed of a transparent heat sink, wherein the semiconductor light-emitting device is bonded to the package window portion in accordance with an interconnection pattern. A method of manufacturing semiconductor light-emitting device package also is described.
    Type: Grant
    Filed: May 14, 1997
    Date of Patent: February 15, 2000
    Assignee: Sony Corporation
    Inventors: Kazuhiko Nemoto, Osamu Matsuda, Toshimasa Kobayashi, Masato Doi
  • Patent number: 5699098
    Abstract: A recording unit structure comprising a recording material layer faced to a recording body with a space incorporated therebetween, so that said recording material is vaporized and transferred to said recording body through said space, provided that pores are provided to a vaporizing portion of the recording material in such a manner that the pores be present within the layer of the recording material. The recording unit structure of the present invention assures a recording of excellent quality, is made compact and light weight, yields a high thermal efficiency, and produces no used ink sheets and other wastes. The present invention also relates to a recording device comprising the same.
    Type: Grant
    Filed: May 28, 1996
    Date of Patent: December 16, 1997
    Assignee: Sony Corporation
    Inventors: Osamu Matsuda, Toshimasa Kobayashi, Shuji Sato, Hideki Hirano, Kenji Shinozaki, Takayuki Fujioka
  • Patent number: 5521140
    Abstract: A recording unit structure comprising a recording material layer faced to a recording body with a space incorporated therebetween, so that said recording material is vaporized and transferred to said recording body through said space, provided that pores are provided to a vaporizing portion of the recording material in such a manner that the pores be present within the layer of the recording material. The recording unit structure of the present invention assures a recording of excellent quality, is made compact and light weight, yields a high thermal efficiency, and produces no used ink sheets and other wastes. The present invention also relates to a recording device comprising the same.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: May 28, 1996
    Assignee: Sony Corporation
    Inventors: Osamu Matsuda, Toshimasa Kobayashi, Shuji Sato, Hideki Hirano, Kenji Shinozaki, Takayuki Fujioka
  • Patent number: 5387549
    Abstract: An ohmic electrode and a process for fabricating the same, said process comprising forming a first metallic layer comprising indium or an indium alloy on a compound semiconductor layer, forming a second metallic layer comprising a gold-germanium alloy on said first metallic layer, and subjecting the first and the second metallic layer thus obtained to alloying treatment. The present invention provides favorable ohmic contacts by effecting the alloying treatment at a relatively low temperature of 350.degree. C. or even lower.
    Type: Grant
    Filed: May 13, 1994
    Date of Patent: February 7, 1995
    Assignee: Sony Corporation
    Inventor: Toshimasa Kobayashi
  • Patent number: 5096741
    Abstract: The present invention relates to a corrosionproof coating material characterized by including a triazine derivative possessing a thiol group, and accordingly being effective for coating an extremely air oxidizable metallic material and processed articles thereof, such as a rare earth-iron-boron type permanent magnet, that are easily oxidizable in the air.
    Type: Grant
    Filed: December 19, 1990
    Date of Patent: March 17, 1992
    Assignee: Kabushiki Kaisha Sankyo Seiki Seisakusho
    Inventors: Toshihiro Kobayashi, Takafumi Kuwazawa, Toshimasa Kobayashi
  • Patent number: 4179800
    Abstract: In a printed wiring board having an outwardly flaring through-hole, a conductive pattern is formed on the inwardly directed surface of the hole so as to reach a principal surface of the board only at that circumferential portion of the hole where the pattern is continuous to a pattern portion, if any, formed on the principal surface. The pattern is formed in the through-hole by positive use of that portion of a photoresist film formed on the principal surface to cover the hole which partly protrudes into the hole.
    Type: Grant
    Filed: May 15, 1978
    Date of Patent: December 25, 1979
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Toshio Takaba, Toshimasa Kobayashi