Abstract: A lower layer diffusion layer of a metal-insulator-semiconductor-type (MIS-type) condenser is formed by implanting and diffusing phosphorus into an upper portion of an epitaxial layer formed on a semiconductor substrate. Thereafter, a silicon nitride film functioning as a dielectric film of the MIS type condenser is formed on the lower layer diffusion layer, and a poly-silicon film functioning as a protective film for the silicon nitride film is formed on the silicon nitride film in succession to the formation of the silicon nitride film without performing any etching operation. The formation of the silicon nitride film and the poly-silicon film is performed according to a vacuum chemical vapor deposition in the same chamber to prevent the silicon nitride film from being exposed to oxygen. Thereafter, the silicon nitride film and the poly-silicon film are baked to form an oxidized film surrounding the silicon nitride film and the poly-silicon film.

Abstract: A method of making a semiconductor integrated circuit provided with an isolating region constituted of an upper and lower isolating regions, and integrated circuit element regions is disclosed, wherein: the lower isolating region is diffused upward to a depth of a little more than half the thickness of an epitaxial layer to link with the upper isolating region prior to a doping of the upper isolating region; the doping of the lower isolating region and integrated circuit element regions, is implemented by means of ion implantation through a resist film which is capable of blocking ions implanted and in which specified doping windows have been formed in advance, and a SiO.sub.2 film is used as a reference mask in an ion implanting step, and the respective borders of the upper isolating region and the specified regions of the circuit elements is determined by self-alignment.

Abstract: A method of manufacturing a semiconductor integrated circuit comprises the steps of: forming an epitaxial layer covering a semiconductor substrate and buried layers; forming isolation regions dividing the epitaxial layer into a plurality of islands; forming a lower electrode region of an MIS type capacitor in one of the islands; forming a base region of a vertical bipolar transistor simultaneously with or independently from the lower electrode in another island; depositing a thin dielectric layer of the MIS type capacitor on a portion of the lower electrode region; thereafter selectively diffusing impurities into the surface layer of the base region so as to form an emitter region of the vertical bipolar transistor; and forming an upper electrode of the MIS type capacitor on the thin dielectric layer.