Patents by Inventor Toshimasa Yano

Toshimasa Yano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140159851
    Abstract: An inductor device has a core base, and an inductor structure including a first conductive pattern formed on a first surface side of the core base, a second conductive pattern formed on a second surface side of the core base on the opposite side with respect to the first surface side of the core base, and a through-hole conductor formed through the core base such that the through-hole conductor is connecting the first conductive pattern and the second conductive pattern. The core base includes a magnetic material layer including a magnetic material, and the magnetic material layer of the core base is positioned adjacent to at least a portion of the periphery of the inductor structure.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 12, 2014
    Applicant: IBIDEN CO., LTD.
    Inventors: Yasuhiko MANO, Kazuhiro Yoshikawa, Toshimasa Yano, Takashi Kariya
  • Patent number: 8546922
    Abstract: A wiring board including a core substrate made of an insulative material and having a penetrating portion, a first interlayer insulation layer formed on the surface of the core substrate, a first conductive circuit formed on the surface of the first interlayer insulation layer, a first via conductor formed in the first interlayer insulation layer, and an electronic component accommodated in the penetrating portion of the core substrate and including a semiconductor element, a bump body mounted on the semiconductor element, a conductive circuit connected to the bump body, an interlayer resin insulation layer formed on the conductive circuit, and a via conductor formed in the interlayer resin insulation layer. The first via conductor has a tapering direction which is opposite of a tapering direction of the via conductor in the electronic component.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: October 1, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Toshiki Furutani, Daiki Komatsu, Nobuya Takahashi, Masatoshi Kunieda, Naomi Fujita, Koichi Tsunoda, Minetaka Oyama, Toshimasa Yano
  • Publication number: 20120175754
    Abstract: A wiring board including a core substrate made of an insulative material and having a penetrating portion, a first interlayer insulation layer formed on the surface of the core substrate, a first conductive circuit formed on the surface of the first interlayer insulation layer, a first via conductor formed in the first interlayer insulation layer, and an electronic component accommodated in the penetrating portion of the core substrate and including a semiconductor element, a bump body mounted on the semiconductor element, a conductive circuit connected to the bump body, an interlayer resin insulation layer formed on the conductive circuit, and a via conductor formed in the interlayer resin insulation layer. The first via conductor has a tapering direction which is opposite of a tapering direction of the via conductor in the electronic component.
    Type: Application
    Filed: September 28, 2011
    Publication date: July 12, 2012
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Daiki KOMATSU, Nobuya TAKAHASHI, Masatoshi KUNIEDA, Naomi FUJITA, Koichi TSUNODA, Minetaka OYAMA, Toshimasa YANO
  • Publication number: 20120018198
    Abstract: An electronic component including a substrate having a surface and one or more trench portions opening on the surface, a capacitor portion having a lower electrode formed on the surface of the substrate and on the wall surface of the trench portion, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, a resin filler filling the space inside the trench portion lined by the upper electrode, an insulation layer formed on the surface of the substrate, a conductive portion formed on the insulation layer and positioned to cover the trench portion, and a via conductor connecting the conductive portion and one of the lower electrode and the upper electrode.
    Type: Application
    Filed: March 29, 2011
    Publication date: January 26, 2012
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Minetaka Oyama, Daiki Komatsu, Koichi Tsunoda, Toshimasa Yano