Patents by Inventor Toshimichi Iwamori
Toshimichi Iwamori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7577323Abstract: A photoelectric circuit board includes a substrate, an optical waveguide and a core exposure surface. The substrate has an inspection opening. The optical waveguide includes a core and a clad formed around the core. The optical waveguide is formed on one surface side of the substrate, is exposed to the inspection opening, and has a portion curved toward the inspection opening. The core exposure surface is formed in the curved portion of the optical waveguide so that the core is exposed out of the clad.Type: GrantFiled: May 14, 2008Date of Patent: August 18, 2009Assignee: Fuji Xerox Co., Ltd.Inventors: Toshimichi Iwamori, Yoshihisa Ueda
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Patent number: 7529449Abstract: A substrate is bonded to a semiconductor integrated circuit to which plural solder bumps have been adhered. The substrate includes: plural contact portions that are disposed at positions corresponding to the positions of the plural solder bumps and include contact surfaces which contact the solder bumps; and a guidance structure that is disposed in the contact surfaces and, when the solder bumps are melted, guides the melted solder bumps to predetermined regions within the contact surfaces. The predetermined regions are set so that the semiconductor integrated circuit and the substrate are properly aligned.Type: GrantFiled: August 25, 2005Date of Patent: May 5, 2009Assignee: Fuji Xerox Co., Ltd.Inventors: Brian Ormond, Masaki Kobayashi, Toshimichi Iwamori
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Publication number: 20090010591Abstract: A photoelectric circuit board includes a substrate, an optical waveguide and a core exposure surface. The substrate has an inspection opening. The optical waveguide includes a core and a clad formed around the core. The optical waveguide is formed on one surface side of the substrate, is exposed to the inspection opening, and has a portion curved toward the inspection opening. The core exposure surface is formed in the curved portion of the optical waveguide so that the core is exposed out of the clad.Type: ApplicationFiled: May 14, 2008Publication date: January 8, 2009Applicant: FUJI XEROX CO., LTD.Inventors: Toshimichi IWAMORI, Yoshihisa UEDA
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Patent number: 7416350Abstract: An optical connectorcomprises an optical cable; and a ferrule that is attached to an end of the optical cable and performs optical connection; a cover that defines a through hole that the optical cable passes through, the cover covering the ferrule without contacting the ferrule; and a removal-preventing section that is disposed inside a wall that the through hole of the cover is formed on, and the removal-preventing section preventing a pulling force applied to the optical cable from being transferred to the ferrule.Type: GrantFiled: September 26, 2006Date of Patent: August 26, 2008Assignee: Fuji Xerox Co., Ltd.Inventors: Yoshihisa Ueda, Toshimichi Iwamori
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Semiconductor integrated circuit and semiconductor integrated circuit arrangement device and process
Publication number: 20070222989Abstract: A semiconductor integrated circuit which includes an optical device for performing optical communication and which exhibits a predetermined function. This semiconductor integrated circuit includes a first electricity supply portion, which is connected to the optical device, and a second electricity supply portion, which differs from the first electricity supply portion and is connected to the optical device.Type: ApplicationFiled: May 24, 2007Publication date: September 27, 2007Applicant: FUJI XEROX CO., LTD.Inventors: Brian Ormond, Toshimichi Iwamori -
Semiconductor integrated circuit and semiconductor integrated circuit arrangement device and process
Patent number: 7260284Abstract: A semiconductor integrated circuit which includes an optical device for performing optical communication and which exhibits a predetermined function. This semiconductor integrated circuit includes a first electricity supply portion, which is connected to the optical device, and a second electricity supply portion, which differs from the first electricity supply portion and is connected to the optical device.Type: GrantFiled: June 13, 2005Date of Patent: August 21, 2007Assignee: Fuji Xerox Co., Ltd.Inventors: Brian Ormond, Toshimichi Iwamori -
Publication number: 20070183722Abstract: An optical connectorcomprises an optical cable; and a ferrule that is attached to an end of the optical cable and performs optical connection; a cover that defines a through hole that the optical cable passes through, the cover covering the ferrule without contacting the ferrule; and a removal-preventing section that is disposed inside a wall that the through hole of the cover is formed on, and the removal-preventing section preventing a pulling force applied to the optical cable from being transferred to the ferrule.Type: ApplicationFiled: September 26, 2006Publication date: August 9, 2007Inventors: Yoshihisa Ueda, Toshimichi Iwamori
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Publication number: 20070160330Abstract: An optical connector mounted on a board comprises an optical connector main body that performs optical transmission and a fixing pin that fixes the optical connector main body to the board. The optical connector main body has a pin insertion hole that the fixing pin is inserted.Type: ApplicationFiled: September 22, 2006Publication date: July 12, 2007Inventors: Kenji Yamazaki, Toshimichi Iwamori
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Publication number: 20060204167Abstract: A substrate is bonded to a semiconductor integrated circuit to which plural solder bumps have been adhered. The substrate includes: plural contact portions that are disposed at positions corresponding to the positions of the plural solder bumps and include contact surfaces which contact the solder bumps; and a guidance structure that is disposed in the contact surfaces and, when the solder bumps are melted, guides the melted solder bumps to predetermined regions within the contact surfaces. The predetermined regions are set so that the semiconductor integrated circuit and the substrate are properly aligned.Type: ApplicationFiled: August 25, 2005Publication date: September 14, 2006Inventors: Brian Ormond, Masaki Kobayashi, Toshimichi Iwamori
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Patent number: 7106921Abstract: The present invention provides an optical waveguide interconnection board, including: optical input and output ports; at least one optical waveguide corresponding to an optical circuit pattern; and at least one light direction-changing element each of which is disposed between one of the optical input port and the optical output port and one of the at least one optical waveguide or, when the optical waveguide interconnection board has two or more optical waveguides, between two of the optical waveguides, and which comprises at least one of at least one light direction-changing element A that changes the direction of light in a plane parallel to a plane of the optical waveguide interconnection board and at least one light direction-changing element B that changes the direction of light to a direction having an angle with respect to a plane parallel to the plane of the optical waveguide interconnection board.Type: GrantFiled: October 5, 2004Date of Patent: September 12, 2006Assignee: Fuji Xerox Co., Ltd.Inventors: Toshimichi Iwamori, Takayuki Takeuchi, Toshihisa Hamano
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Semiconductor integrated circuit and semiconductor integrated circuit arrangement device and process
Publication number: 20060062511Abstract: A semiconductor integrated circuit which includes an optical device for performing optical communication and which exhibits a predetermined function. This semiconductor integrated circuit includes a first electricity supply portion, which is connected to the optical device, and a second electricity supply portion, which differs from the first electricity supply portion and is connected to the optical device.Type: ApplicationFiled: June 13, 2005Publication date: March 23, 2006Applicant: FUJI XEROX CO., LTD.Inventors: Brian Ormond, Toshimichi Iwamori -
Publication number: 20050213872Abstract: The present invention provides an optical waveguide interconnection board, including: optical input and output ports; at least one optical waveguide corresponding to an optical circuit pattern; and at least one light direction-changing element each of which is disposed between one of the optical input port and the optical output port and one of the at least one optical waveguide or, when the optical waveguide interconnection board has two or more optical waveguides, between two of the optical waveguides, and which comprises at least one of at least one light direction-changing element A that changes the direction of light in a plane parallel to a plane of the optical waveguide interconnection board and at least one light direction-changing element B that changes the direction of light to a direction having an angle with respect to a plane parallel to the plane of the optical waveguide interconnection board.Type: ApplicationFiled: October 5, 2004Publication date: September 29, 2005Applicant: Fuji Xerox Co., Ltd.Inventors: Toshimichi Iwamori, Takayuki Takeuchi, Toshihisa Hamano
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Patent number: 6634741Abstract: The present invention provides an ink jet recording head that enables stable high-speed continuous printing, its manufacturing method and an ink jet recording device. A bubble generated in a common liquid chamber is moved to the side of an ink tank via a communicating port formed in a sufficient size and a supply passage. That is, a bubble generated inside a common liquid chamber is exhausted satisfactorily from the common liquid chamber by forming the communicating port in a shape which the bubble can pass, resulting in the supply of ink to the common liquid chamber and an individual passage (nozzle) prevented from being blocked by the bubble. As a result, even if high-speed continuous jetting (printing) is performed, stable printing is enabled.Type: GrantFiled: April 30, 2001Date of Patent: October 21, 2003Assignee: Fuji Xerox Co., Ltd.Inventors: Masaki Kataoka, Kazuyuki Oda, Michiaki Murata, Yoshihisa Ueda, Toshimichi Iwamori
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Patent number: 6527903Abstract: A satisfactory bonding is implemented at low cost. In a step, a resin layer is formed on a bonding surface side of a silicon wafer on which portion are formed electro-thermal transducers. In a later step, the silicon wafer and another silicon wafer are aligned and fixed temporarily, then the atmosphere is set at a pressure of 10−3 mbar or lower and the temperature is set at 300° C. or higher, and voltage is applied across the both wafers while pressure is applied to the wafers. When the value of an electric current flowing across the wafers has reached a level of a certain current value or lower, the application of the voltage is stopped and the atmosphere is opened to the atmospheric pressure while reducing the temperature.Type: GrantFiled: August 30, 2000Date of Patent: March 4, 2003Assignee: Fuji Xerox Co. Ltd.Inventors: Masaki Kataoka, Michiaki Murata, Norikuni Funatsu, Kumiko Tanaka, Toshimichi Iwamori
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Publication number: 20010055053Abstract: The present invention provides an ink jet recording head that enables stable high-speed continuous printing, its manufacturing method and an ink jet recording device. A bubble generated in a common liquid chamber is moved to the side of an ink tank via a communicating port formed in a sufficient size and a supply passage. That is, a bubble generated inside a common liquid chamber is exhausted satisfactorily from the common liquid chamber by forming the communicating port in a shape which the bubble can pass, resulting in the supply of ink to the common liquid chamber and an individual passage (nozzle) prevented from being blocked by the bubble. As a result, even if high-speed continuous jetting (printing) is performed, stable printing is enabled.Type: ApplicationFiled: April 30, 2001Publication date: December 27, 2001Applicant: Fuji Xerox Co. Ltd.Inventors: Masaki Kataoka, Kazuyuki Oda, Michiaki Murata, Yoshihisa Ueda, Toshimichi Iwamori
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Patent number: 5236870Abstract: A semiconductor integrated circuit providing a novel patterned multilayered wiring structure to enhance the degree of the integration of the circuit and the speed of the operation. The structure includes at least one first interlaid electric insulator film on the wall of the contact portion of a first wiring layer and its vicinity, a second interlaid electric insulator film, which reacts distinctly to the etching process utilized from the first interlaid electric insulator film, is provided on a substrate.Type: GrantFiled: November 26, 1991Date of Patent: August 17, 1993Assignee: Fuji Xerox Co., Ltd.Inventors: Yasushi Sakata, Toshimichi Iwamori
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Patent number: 5005067Abstract: A semiconductor integrated circuit providing a novel patterned multilayered wiring structure to enhance the degree of the integration of the circuit and the speed of the operation. The structure includes at least one first interlaid electric insulator film on the wall of the contact portion of a first wiring layer and its vicinity, a second interlaid electric insulator film, which reacts distinctly to the etching process utilized from the first interlaid electric insulator film, is provided on a substrate.Type: GrantFiled: March 7, 1988Date of Patent: April 2, 1991Assignee: Fuji Xerox Co., Ltd.Inventors: Yasushi Sakata, Toshimichi Iwamori