Patents by Inventor Toshimitsu Kitamura

Toshimitsu Kitamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220138547
    Abstract: An apparatus of analog-neuron includes a synapse circuit for performing arithmetic processing for multiplying an input signal that arrives at an input terminal by a weight value, a synapse output holding means for holding an output signal of the synapse circuit, and a power control unit for controlling whether to supply power at least to the synapse circuit or to stop supplying power in response to whether the input signal has arrived at the input terminal or has been lost.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 5, 2022
    Applicants: Toshiba Information Systems (Japan) Corporation, KABUSHIKI KAISHA TOSHIBA
    Inventors: Manabu Saito, Junichi Sugino, Toshimitsu Kitamura, Yutaka Tamura, Koji Takahashi, Takao Marukame
  • Publication number: 20200380347
    Abstract: A neural network not requiring massive changes in configuration when changing the number of stages (number of levels) of the neural network. This neural network is provided with at least one neuron core 10 performing an analog multiply-accumulate operation and a weight-value-supply control unit 30 supplying the weight value to the neuron core 10. This neural network is subjected to control processing by a control-processor unit 40 controlling the supply of the weight value from said weight-value-supply control unit 30 in synchronization with the timing of the analog multiply-accumulate operation of the neuron core 10, and processing the data output from the neuron core 10 at every analog multiply-accumulate operation performed by said neuron core as serial data and/or parallel data.
    Type: Application
    Filed: June 3, 2020
    Publication date: December 3, 2020
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Information Systems (Japan) Corporation
    Inventors: Takao MARUKAME, Kazuo ISHIKAWA, Junichi SUGINO, Toshimitsu KITAMURA, Yutaka TAMURA, Koji TAKAHASHI
  • Publication number: 20020182288
    Abstract: Confectionery products are made from brown rice by germinating steam-cooked brown rice and then making the same, optionally with up to 90% by wt of steam-cooked white rice and/or polished wheat, into koji by the usual procedure for making koji by inoculation with the mold Aspergillus oryzae; subjecting the koji, optionally with a minor amount of maltose, to a primary fermentation in the presence of an enzyme mixture comprising enzymes capable of decomposing the starch, protein, and lipids therein to yield a substantially completely liquified solution; subjecting the resultant solution to a secondary fermentation with baker's yeast, optionally with an enzyme mixture similar to that for the primary fermentation, to saccharify the same into sugars: and concentrating the saccharified solution into a syrupy or solid confectionery product, optionally with sufficient sugar added to aid in solidification.
    Type: Application
    Filed: March 11, 2002
    Publication date: December 5, 2002
    Inventors: Taketo Kanehiro, Toshimitsu Kitamura, Cho Oyama