Patents by Inventor Toshimitsu Kogure

Toshimitsu Kogure has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220359122
    Abstract: A method for manufacturing a multilayer ceramic electronic device includes punching out a ceramic sheet by one of left and right side surfaces of a laminated body so as to form a side margin part on the one of the left and right side surfaces of said laminated body; and punching out another ceramic sheet by another of the left and right side surfaces of the laminated body so as to form a side margin part on the another of the left and right side surfaces of said laminated body, thereby forming a ceramic main body having the laminated body and the pair of side margin parts that respectively cover the left and right side surfaces of the laminated body. The width W is greater than the length L in the multilayer ceramic electronic device.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 10, 2022
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Shota TANAKA, Joji KOBAYASHI, Toshimitsu KOGURE
  • Patent number: 11017949
    Abstract: A multi-layer ceramic capacitor according to an embodiment of the present invention includes a multi-layer, side margins and offset sections. The multi-layer includes internal electrodes and dielectric layers alternately laminated. The side margins are configured of a dielectric and disposed to cover side faces of the multi-layer. The offset sections are made with amorphous areas or gap areas. The offset sections are formed between the internal electrodes and the side margins such that ends at side faces of the internal electrodes are offset from the side faces to an inward direction of the multi-layer.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: May 25, 2021
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Yoichi Kato, Kotaro Mizuno, Yukihiro Konishi, Yasunari Kato, Yosuke Sato, Hidenori Wakayanagi, Joji Kobayashi, Toshimitsu Kogure
  • Publication number: 20200357574
    Abstract: A multilayer ceramic electronic device includes: a ceramic main body having a laminated body and a pair of side margin parts that respectively cover left and right side surfaces of the laminated body, the laminated body including a plurality of internal electrodes laminated in a vertical direction, side ends of each of the internal electrodes reaching and being flush with the respective side surfaces of the laminated body within a range of 0.5 um ?m in the widthwise direction; and a pair of external electrodes respectively covering end surfaces of the ceramic main body, wherein a width dimension W of the multilayer ceramic electronic device in the widthwise direction is greater than a length dimension L of the multilayer ceramic electronic device in the lengthwise direction.
    Type: Application
    Filed: May 8, 2020
    Publication date: November 12, 2020
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Shota TANAKA, Joji KOBAYASHI, Toshimitsu KOGURE
  • Patent number: 10622152
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction and has a porosity of 1% or less.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: April 14, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Toshimitsu Kogure, Joji Kobayashi, Yasunari Kato, Yosuke Sato, Tetsuhiko Fukuoka, Ryo Ono
  • Patent number: 10510487
    Abstract: A method of producing a multi-layer ceramic electronic component includes: preparing a multi-layer sheet including laminated ceramic sheets, and internal electrodes disposed between the ceramic sheets; cutting the multi-layer sheet to produce a multi-layer chip having a side surface from which the internal electrodes are exposed; removing a superficial layer of the side surface of the multi-layer chip; and providing a side margin to the side surface of the multi-layer chip, the superficial layer being removed from the side surface.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: December 17, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Yasunari Kato, Joji Kobayashi, Toshimitsu Kogure
  • Publication number: 20180108482
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction and internal electrodes disposed between the ceramic layers. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction and has a porosity of 1% or less.
    Type: Application
    Filed: October 12, 2017
    Publication date: April 19, 2018
    Inventors: Toshimitsu Kogure, Joji Kobayashi, Yasunari Kato, Yosuke Sato, Tetsuhiko Fukuoka, Ryo Ono
  • Publication number: 20170287643
    Abstract: A method of producing a multi-layer ceramic electronic component includes: preparing a multi-layer chip including ceramic layers laminated in a first axis direction, internal electrodes disposed between the ceramic layers, and a side surface on which the internal electrodes are exposed; applying a ceramic paste to the side surface; and pressing the applied ceramic paste toward the side surface to planarize the applied ceramic paste.
    Type: Application
    Filed: March 30, 2017
    Publication date: October 5, 2017
    Inventors: Joji Kobayashi, Toshimitsu Kogure, Yasunari Kato, Hidenori Wakayanagi, Yosuke Sato
  • Publication number: 20170186546
    Abstract: A method of producing a multi-layer ceramic electronic component includes: preparing a multi-layer sheet including laminated ceramic sheets, and internal electrodes disposed between the ceramic sheets; cutting the multi-layer sheet to produce a multi-layer chip having a side surface from which the internal electrodes are exposed; removing a superficial layer of the side surface of the multi-layer chip; and providing a side margin to the side surface of the multi-layer chip, the superficial layer being removed from the side surface.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 29, 2017
    Inventors: Yasunari Kato, Joji Kobayashi, Toshimitsu Kogure
  • Publication number: 20160351335
    Abstract: A multi-layer ceramic capacitor according to an embodiment of the present invention includes a multi-layer, side margins and offset sections. The multi-layer includes internal electrodes and dielectric layers alternately laminated. The side margins are configured of a dielectric and disposed to cover side faces of the multi-layer. The offset sections are made with amorphous areas or gap areas. The offset sections are formed between the internal electrodes and the side margins such that ends at side faces of the internal electrodes are offset from the side faces to an inward direction of the multi-layer.
    Type: Application
    Filed: May 27, 2016
    Publication date: December 1, 2016
    Inventors: Yoichi Kato, Kotaro Mizuno, Yukihiro Konishi, Yasunari Kato, Yosuke Sato, Hidenori Wakayanagi, Joji Kobayashi, Toshimitsu Kogure