Patents by Inventor Toshimitsu Obonai

Toshimitsu Obonai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240014137
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junichi KOEZUKA, Toshimitsu OBONAI, Masami JINTYOU, Daisuke KUROSAKI
  • Publication number: 20230420522
    Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
    Type: Application
    Filed: September 8, 2023
    Publication date: December 28, 2023
    Applicant: Semiconductor Energy Laboratory Co., Lid.
    Inventors: Yasuharu Hosaka, Toshimitsu OBONAI, Yukinori SHIMA, Masami JINTYOU, Daisuke KUROSAKI, Takashi HAMOCHI, Junichi KOEZUKA, Kenichi OKAZAKI, Shunpei YAMAZAKI
  • Patent number: 11810858
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: November 7, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Toshimitsu Obonai, Masami Jintyou, Daisuke Kurosaki
  • Publication number: 20230317856
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. A semiconductor device includes a first insulating layer, a second insulating layer, a semiconductor layer, and a first conductive layer. The semiconductor layer, the second insulating layer, and the first conductive layer are stacked in this order over the first insulating layer. The second insulating layer has a stacked-layer structure in which a first insulating film, a second insulating film, and a third insulating film are stacked in this order. The first insulating film, the second insulating film, and the third insulating film each contain an oxide. The first insulating film includes a portion in contact with the semiconductor layer. The semiconductor layer contains indium, gallium, and oxygen and includes a region with an indium content percentage higher than a gallium content percentage.
    Type: Application
    Filed: April 10, 2023
    Publication date: October 5, 2023
    Inventors: Junichi KOEZUKA, Kenichi OKAZAKI, Yasuharu HOSAKA, Toshimitsu OBONAI, Yasutaka NAKAZAWA, Seiji YASUMOTO, Shunpei YAMAZAKI
  • Patent number: 11764074
    Abstract: To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: September 19, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Toshimitsu Obonai, Junichi Koezuka, Yukinori Shima, Masahiko Hayakawa, Takashi Hamochi, Suzunosuke Hiraishi
  • Patent number: 11757007
    Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: September 12, 2023
    Inventors: Yasuharu Hosaka, Toshimitsu Obonai, Yukinori Shima, Masami Jintyou, Daisuke Kurosaki, Takashi Hamochi, Junichi Koezuka, Kenichi Okazaki, Shunpei Yamazaki
  • Patent number: 11705525
    Abstract: A semiconductor device with favorable electrical characteristics, a semiconductor device with stable electrical characteristics, or a highly reliable semiconductor device or display device is provided. A first insulating layer and a first conductive layer are stacked over a first region of a first metal oxide layer. A first layer is formed in contact with a second metal oxide layer and a second region of the first metal oxide layer that is not overlapped by the first insulating layer. Heat treatment is performed to lower the resistance of the second region and the second metal oxide layer. A second insulating layer is formed. A second conductive layer electrically connected to the second region is formed over the second insulating layer. Here, the first layer is formed to contain at least one of aluminum, titanium, tantalum, and tungsten.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: July 18, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Masami Jintyou, Yasutaka Nakazawa, Toshimitsu Obonai
  • Patent number: 11637208
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. A semiconductor device includes a first insulating layer, a second insulating layer, a semiconductor layer, and a first conductive layer. The semiconductor layer, the second insulating layer, and the first conductive layer are stacked in this order over the first insulating layer. The second insulating layer has a stacked-layer structure in which a first insulating film, a second insulating film, and a third insulating film are stacked in this order. The first insulating film, the second insulating film, and the third insulating film each contain an oxide. The first insulating film includes a portion in contact with the semiconductor layer. The semiconductor layer contains indium, gallium, and oxygen and includes a region with an indium content percentage higher than a gallium content percentage.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: April 25, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Kenichi Okazaki, Yasuharu Hosaka, Toshimitsu Obonai, Yasutaka Nakazawa, Seiji Yasumoto, Shunpei Yamazaki
  • Publication number: 20220359575
    Abstract: To provide a method for manufacturing a semiconductor device including an oxide semiconductor film having conductivity, or a method for manufacturing a semiconductor device including an oxide semiconductor film having a light-transmitting property and conductivity. The method for manufacturing a semiconductor device includes the steps of forming an oxide semiconductor film over a first insulating film, performing first heat treatment in an atmosphere where oxygen contained in the oxide semiconductor film is released, and performing second heat treatment in a hydrogen-containing atmosphere, so that an oxide semiconductor film having conductivity is formed.
    Type: Application
    Filed: July 11, 2022
    Publication date: November 10, 2022
    Inventors: Masashi OOTA, Noritaka ISHIHARA, Motoki NAKASHIMA, Yoichi KUROSAWA, Shunpei YAMAZAKI, Yasuharu HOSAKA, Toshimitsu OBONAI, Junichi KOEZUKA
  • Publication number: 20220310517
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer.
    Type: Application
    Filed: April 26, 2022
    Publication date: September 29, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junichi KOEZUKA, Toshimitsu OBONAI, Masami JINTYOU, Daisuke KUROSAKI
  • Patent number: 11430817
    Abstract: A novel semiconductor device in which a metal film containing copper (Cu) is used for a wiring, a signal line, or the like in a transistor including an oxide semiconductor film is provided. The semiconductor device includes an oxide semiconductor film having conductivity on an insulating surface and a conductive film in contact with the oxide semiconductor film having conductivity. The conductive film includes a Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti).
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: August 30, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Yukinori Shima, Masami Jintyou, Takashi Hamochi, Satoshi Higano, Yasuharu Hosaka, Toshimitsu Obonai
  • Publication number: 20220149201
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with high reliability is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, and a conductive layer. The semiconductor layer, the second insulating layer, and the conductive layer are stacked in this order over the first insulating layer. The semiconductor layer contains indium and oxygen and has a composition falling within a range obtained by connecting first coordinates (1:0:0), second coordinates (2:1:0), third coordinates (14:7:1), fourth coordinates (7:2:2), fifth coordinates (14:4:21), sixth coordinates (2:0:3), and the first coordinates in this order with a straight line in a ternary diagram showing atomic ratios of indium to an element M and zinc. In addition, the element M is one or more of gallium, aluminum, yttrium, and tin.
    Type: Application
    Filed: February 19, 2020
    Publication date: May 12, 2022
    Inventors: Shunpei YAMAZAKI, Toshimitsu OBONAI, Junichi KOEZUKA, Kenichi OKAZAKI
  • Publication number: 20220140144
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. A highly reliable display device is provided. The semiconductor device includes a first conductive layer, a first insulating layer, a semiconductor layer, and a pair of second conductive layers. The first insulating layer is in contact with a top surface of the first conductive layer. The semiconductor layer is in contact with a top surface of the first insulating layer. The pair of second conductive layers are in contact with a top surface of the semiconductor layer. The pair of second conductive layers are apart from each other in a region overlapping with the first conductive layer.
    Type: Application
    Filed: February 17, 2020
    Publication date: May 5, 2022
    Inventors: Shunpei YAMAZAKI, Toshimitsu OBONAI, Junichi KOEZUKA, Kenichi OKAZAKI
  • Patent number: 11322442
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: May 3, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Toshimitsu Obonai, Masami Jintyou, Daisuke Kurosaki
  • Publication number: 20220127713
    Abstract: A metal oxide film with high electrical characteristics is provided. A metal oxide film with high reliability is provided. The metal oxide film contains indium, M (M is aluminum, gallium, yttrium, or tin), and zinc. In the metal oxide film, distribution of interplanar spacings d determined by electron diffraction by electron beam irradiation from a direction perpendicular to a film surface of the metal oxide film has a first peak and a second peak. The top of the first peak is positioned at greater than or equal to 0.25 nm and less than or equal to 0.30 nm, and the top of the second peak is positioned at greater than or equal to 0.15 nm and less than or equal to 0.20 nm. The distribution of the interplanar spacings d is obtained from a plurality of electron diffraction patterns of a plurality of regions of the metal oxide film. The electron diffraction is performed using an electron beam with a beam diameter of greater than or equal to 0.3 nm and less than or equal to 10 nm.
    Type: Application
    Filed: February 10, 2020
    Publication date: April 28, 2022
    Inventors: Toshimitsu OBONAI, Yasuharu HOSAKA, Kenichi OKAZAKI, Masahiro TAKAHASHI, Tomonori NAKAYAMA, Tomosato KANAGAWA, Shunpei YAMAZAKI
  • Publication number: 20210343869
    Abstract: A semiconductor device with favorable electrical characteristics, a semiconductor device with stable electrical characteristics, or a highly reliable semiconductor device or display device is provided. A first insulating layer and a first conductive layer are stacked over a first region of a first metal oxide layer. A first layer is formed in contact with a second metal oxide layer and a second region of the first metal oxide layer that is not overlapped by the first insulating layer. Heat treatment is performed to lower the resistance of the second region and the second metal oxide layer. A second insulating layer is formed. A second conductive layer electrically connected to the second region is formed over the second insulating layer. Here, the first layer is formed to contain at least one of aluminum, titanium, tantalum, and tungsten.
    Type: Application
    Filed: July 6, 2021
    Publication date: November 4, 2021
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Masami JINTYOU, Yasutaka NAKAZAWA, Toshimitsu OBONAI
  • Publication number: 20210343843
    Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
    Type: Application
    Filed: July 8, 2021
    Publication date: November 4, 2021
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Toshimitsu Obonai, Yukinori Shima, Masami Jintyou, Daisuke Kurosaki, Takashi Hamochi, Junichi Koezuka, Kenichi Okazaki, Shunpei Yamazaki
  • Patent number: 11152512
    Abstract: A semiconductor device with favorable electrical characteristics, a semiconductor device with stable electrical characteristics, or a highly reliable semiconductor device or display device is provided. A first insulating layer and a first conductive layer are stacked over a first region of a first metal oxide layer. A first layer is formed in contact with a second metal oxide layer and a second region of the first metal oxide layer that is not overlapped by the first insulating layer. Heat treatment is performed to lower the resistance of the second region and the second metal oxide layer. A second insulating layer is formed. A second conductive layer electrically connected to the second region is formed over the second insulating layer. Here, the first layer is formed to contain at least one of aluminum, titanium, tantalum, and tungsten.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: October 19, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Masami Jintyou, Yasutaka Nakazawa, Toshimitsu Obonai
  • Patent number: 11063125
    Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: July 13, 2021
    Inventors: Yasuharu Hosaka, Toshimitsu Obonai, Yukinori Shima, Masami Jintyou, Daisuke Kurosaki, Takashi Hamochi, Junichi Koezuka, Kenichi Okazaki, Shunpei Yamazaki
  • Publication number: 20210167212
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. A semiconductor device includes a first insulating layer, a second insulating layer, a semiconductor layer, and a first conductive layer. The semiconductor layer, the second insulating layer, and the first conductive layer are stacked in this order over the first insulating layer. The second insulating layer has a stacked-layer structure in which a first insulating film, a second insulating film, and a third insulating film are stacked in this order. The first insulating film, the second insulating film, and the third insulating film each contain an oxide. The first insulating film includes a portion in contact with the semiconductor layer. The semiconductor layer contains indium, gallium, and oxygen and includes a region with an indium content percentage higher than a gallium content percentage.
    Type: Application
    Filed: July 24, 2019
    Publication date: June 3, 2021
    Inventors: Junichi KOEZUKA, Kenichi OKAZAKI, Yasuharu HOSAKA, Toshimitsu OBONAI, Yasutaka NAKAZAWA, Seiji YASUMOTO, Shunpei YAMAZAKI