Abstract: Provided is a plasma processing method and apparatus and a tray for plasma processing, which are able to improve temperature controllability of a substrate. If a vacuum chamber is evacuated by a pump while introducing a specified gas by a gas supply unit into the vacuum chamber and a high-frequency power is applied by a coil use high-frequency power supply to a coil while maintaining an interior of the vacuum chamber at a specified pressure, then plasma is generated in the vacuum chamber, and a substrate placed on a substrate electrode can be subjected to plasma processing. At this time, by providing an adhesive sheet between the substrate electrode and the substrate, temperature controllability of the substrate can be improved.

Abstract: A connecting structure includes a circuit board with a first connection land having a plurality of conductor patterns on the surface thereof, a second connection land disposed in a position opposite to the first connection land of the circuit board, and a flexible board including an insulating layer formed so as to surround at least a part of outer periphery of the second connection land. The first connection land and the second connection land are bonded to each other with a bonding member, and the insulating layer is thicker than the total thickness of the second connection land and the first connection land. It is possible to obtain an electronic circuit connecting structure which is free from short-circuit due to running of the bonding member such as solder even with the connecting land greatly reduced in size, and its connecting method.

Abstract: A connecting structure comprises a circuit board with a first connection land having a plurality of conductor patterns on the surface thereof, a second connection land disposed in a position opposite to the first connection land of the circuit board, and a flexible board including an insulating layer formed so as to surround at least a part of outer periphery of the second connection land, wherein the first connection land and the second connection land are bonded to each other with a bonding member, and the insulating layer is thicker than the total thickness of the second connection land and the first connection land. It is possible to obtain an electronic circuit connecting structure which is free from short-circuit due to running of the bonding member such as solder even with the connecting land greatly reduced in size, and its connecting method.

Abstract: A first polysilicon film, an ONO film, and a second polysilicon film are deposited on a substrate. After ions of an impurity have been implanted in the second polysilicon film, a silicon oxide is deposited on the substrate, followed by a heat treatment for activating the impurity. Patterning is thereafter performed on the silicon oxide film, the second polysilicon film, the ONO film and the first polysilicon film to from stack cell electrodes and an on-gate protective film. The on-gate protective film formed of a silicon oxide film is densified to have improved resistance to etching. Therefore the desired shape of the on-gate protective film is maintained. The film thickness of sidewalls on side surfaces of the stack cell electrodes is set with stability, so that the reduction in insulation withstand voltage between a contact and a control gate electrode is limited.

Abstract: Provided is a plasma processing method and apparatus and a tray for plasma processing, which are able to improve the temperature controllability of a substrate. If a vacuum chamber is evacuated by a pump while introducing a specified gas by a gas supply unit into the vacuum chamber and a high-frequency power is applied by a coil use high-frequency power supply to a coil while maintaining the interior of the vacuum chamber to a specified pressure, then plasma is generated in the vacuum chamber, and a substrate placed on a substrate electrode can be subjected to plasma processing. At this time, by providing an adhesive sheet between the substrate electrode and the substrate, the temperature controllability of the substrate can be improved.

Abstract: Ions of arsenic are selectively implanted at a high concentration into a substrate through a first passivation film of silicon dioxide to obtain a shallow junction, thereby forming a source region with a low resistivity and a first drain region. Then, after the first passivation film is removed, a second passivation film of silicon dioxide is deposited over the substrate as well as over a stacked cell electrode by a CVD process performed at a relatively low temperature. Thereafter, the substrate is annealed in a nitrogen ambient at such a temperature as activating the dopant introduced. In this manner, the dopant in source region and first drain region is activated.

Abstract: A first polysilicon film, an ONO film, and a second polysilicon film are deposited on a substrate. After ions of an impurity have been implanted in the second polysilicon film, a silicon oxide is deposited on the substrate, followed by a heat treatment for activating the impurity. Patterning is thereafter performed on the silicon oxide film, the second polysilicon film, the ONO film and the first polysilicon film to from stack cell electrodes and an on-gate protective film. The on-gate protective film formed of a silicon oxide film is densified to have improved resistance to etching. Therefore the desired shape of the on-gate protective film is maintained. The film thickness of sidewalls on side surfaces of the stack cell electrodes is set with stability, so that the reduction in insulation withstand voltage between a contact and a control gate electrode is limited.

Abstract: Ions of arsenic are selectively implanted at a high concentration into a substrate through a first passivation film of silicon dioxide to obtain a shallow junction, thereby forming a source region with a low resistivity and a first drain region. Then, after the first passivation film is removed, a second passivation film of silicon dioxide is deposited over the substrate as well as over a stacked cell electrode by a CVD process performed at a relatively low temperature. Thereafter, the substrate is annealed in a nitrogen ambient at such a temperature as activating the dopant introduced. In this manner, the dopant in source region and first drain region is activated.