Patents by Inventor Toshinari Sasaki

Toshinari Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9997639
    Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: June 12, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Hajime Tokunaga, Toshinari Sasaki, Keisuke Murayama, Daisuke Matsubayashi
  • Publication number: 20180158956
    Abstract: A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.
    Type: Application
    Filed: January 16, 2018
    Publication date: June 7, 2018
    Inventors: Junichi KOEZUKA, Toshinari SASAKI, Katsuaki TOCHIBAYASHI, Shunpei YAMAZAKI
  • Patent number: 9985118
    Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: May 29, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Publication number: 20180145138
    Abstract: In a transistor including an oxide semiconductor film, movement of hydrogen and nitrogen to the oxide semiconductor film is suppressed. Further, in a semiconductor device using a transistor including an oxide semiconductor film, a change in electrical characteristics is suppressed and reliability is improved. A transistor including an oxide semiconductor film and a nitride insulating film provided over the transistor are included, and an amount of hydrogen molecules released from the nitride insulating film by thermal desorption spectroscopy is less than 5×1021 molecules/cm3, preferably less than or equal to 3×1021 molecules/cm3, more preferably less than or equal to 1×1021 molecules/cm3, and an amount of ammonia molecules released from the nitride insulating film by thermal desorption spectroscopy is less than 1×1022 molecules/cm3, preferably less than or equal to 5×1021 molecules/cm3, more preferably less than or equal to 1×1021 molecules/cm3.
    Type: Application
    Filed: January 18, 2018
    Publication date: May 24, 2018
    Inventors: Toshinari SASAKI, Takashi HAMOCHI, Toshiyuki MIYAMOTO, Masafumi NOMURA, Junichi KOEZUKA, Kenichi OKAZAKI
  • Publication number: 20180138211
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Application
    Filed: October 6, 2017
    Publication date: May 17, 2018
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • Patent number: 9972718
    Abstract: A semiconductor device includes a transistor including a gate electrode over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, and an oxide insulating film covering the transistor. The multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film contains more oxygen than that in the stoichiometric composition, and in the transistor, by a bias-temperature stress test, threshold voltage does not change or the amount of the change in a positive direction or a negative direction is less than or equal to 1.0 V, preferably less than or equal to 0.5 V.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: May 15, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Hajime Tokunaga, Toshinari Sasaki, Keisuke Murayama, Daisuke Matsubayashi
  • Patent number: 9960278
    Abstract: To provide a highly reliable semiconductor device manufactured by giving stable electric characteristics to a semiconductor device including an oxide semiconductor. In a manufacturing process of a transistor, an oxide semiconductor layer, a source electrode layer, a drain electrode layer, a gate insulating film, a gate electrode layer, and an aluminum oxide film are formed in this order, and then heat treatment is performed on the oxide semiconductor layer and the aluminum oxide film, whereby an oxide semiconductor layer from which an impurity containing a hydrogen atom is removed and which includes a region containing oxygen more than the stoichiometric proportion is formed. In addition, when the aluminum oxide film is formed, entry and diffusion of water or hydrogen into the oxide semiconductor layer from the air due to heat treatment in a manufacturing process of a semiconductor device or an electronic appliance including the transistor can be prevented.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: May 1, 2018
    Inventors: Yuhei Sato, Keiji Sato, Toshinari Sasaki, Tetsunori Maruyama, Atsuo Isobe, Tsutomu Murakawa, Sachiaki Tezuka
  • Patent number: 9960279
    Abstract: Hydrogen concentration and oxygen vacancies in an oxide semiconductor film are reduced. Reliability of a semiconductor device which includes a transistor using an oxide semiconductor film is improved. One embodiment of the present invention is a semiconductor device which includes a base insulating film; an oxide semiconductor film formed over the base insulating film; a gate insulating film formed over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film provided therebetween. The base insulating film shows a signal at a g value of 2.01 by electron spin resonance. The oxide semiconductor film does not show a signal at a g value of 1.93 by electron spin resonance.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: May 1, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Kosei Noda, Yuhei Sato, Yuta Endo
  • Patent number: 9954007
    Abstract: It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: April 24, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshinari Sasaki, Junichiro Sakata, Masashi Tsubuku
  • Publication number: 20180101044
    Abstract: A display device includes a flexible first substrate, a flexible second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a sealing member sealing the liquid crystal layer between the first substrate and the second substrate, a first optical member bonded to the first substrate, a terminal section on the first substrate, the terminal section being in a region not overlapping the second substrate, a driving circuit substrate connected with the terminal section, and a second optical member or a resin member, the terminal section being between the first optical member and the second optical member or between the first optical member and the resin member.
    Type: Application
    Filed: September 19, 2017
    Publication date: April 12, 2018
    Inventors: Shinichiro OKA, Toshinari SASAKI
  • Publication number: 20180090515
    Abstract: A semiconductor device includes a first resin layer, one or more first wirings above the first resin layer, a second resin layer above the first wiring, the second resin layer including a first opening part, a transistor above the second resin layer, the transistor including a semiconductor layer, a gate insulation layer, and a gate electrode layer; and a second wiring above the second resin layer, the second wiring being connected to the transistor and connected to the first wiring via the first opening part.
    Type: Application
    Filed: September 8, 2017
    Publication date: March 29, 2018
    Inventors: Toshinari SASAKI, Shinichiro Oka, Takuma Nishinohara
  • Publication number: 20180083049
    Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.
    Type: Application
    Filed: November 30, 2017
    Publication date: March 22, 2018
    Inventors: Junichiro SAKATA, Toshinari SASAKI, Miyuki HOSOBA
  • Patent number: 9921429
    Abstract: There is provided a display device including a first base material, a second base material, an optical layer placed between the first base material and the second base material, and a first retardation layer placed in contact with the first base material, wherein the first base material and the second base material are formed from a polyimide, and the first retardation layer and the second retardation layer are liquid crystal layers which are vertically aligned. Providing the first and second retardation layers in contact with the first and second base materials make it possible to achieve a reduction in the thickness of the display device.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: March 20, 2018
    Assignee: Japan Display Inc.
    Inventors: Shinichiro Oka, Toshinari Sasaki, Yasushi Tomioka
  • Publication number: 20180069126
    Abstract: A semiconductor device includes an n-type oxide semiconductor layer, a gate electrode above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first terminal connected to the oxide semiconductor layer, and a second terminal connected to the gate electrode, a potential applied to the second terminal being higher than a potential applied to the first terminal.
    Type: Application
    Filed: August 25, 2017
    Publication date: March 8, 2018
    Inventors: Toshinari SASAKI, Hiroshi TABATAKE
  • Patent number: 9911860
    Abstract: An object is to improve field effect mobility of a thin film transistor using an oxide semiconductor. Another object is to suppress increase in off current even in a thin film transistor with improved field effect mobility. In a thin film transistor using an oxide semiconductor layer, by forming a semiconductor layer having higher electrical conductivity and a smaller thickness than the oxide semiconductor layer between the oxide semiconductor layer and a gate insulating layer, field effect mobility of the thin film transistor can be improved, and increase in off current can be suppressed.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: March 6, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Toshinari Sasaki
  • Patent number: 9905696
    Abstract: A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: February 27, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Toshinari Sasaki, Katsuaki Tochibayashi, Shunpei Yamazaki
  • Patent number: 9859309
    Abstract: A display device in an embodiment according to the present invention includes a first substrate, a second substrate opposing the first substrate, and a transistor provided in the first substrate, a scanning signal line, a video signal line, and a pixel electrode that are electrically connected to the transistor, and a first insulating layer. The thickness of the first substrate is 0.3 mm or less, the first insulating layer contacts the first substrate, and is provided between the first substrate and the transistor, and the first insulating layer includes an organic insulating layer.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: January 2, 2018
    Assignee: Japan Display Inc.
    Inventors: Takenori Hirota, Hidekazu Miyake, Toshinari Sasaki, Shinichiro Oka
  • Patent number: 9852906
    Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer including a channel formation region using an oxide semiconductor layer, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: December 26, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
  • Patent number: 9853059
    Abstract: A semiconductor device includes a first transistor including a first electrode, a first insulating layer above the first electrode, the first insulating layer having a first side wall, a first oxide semiconductor layer on the first side wall, the first oxide semiconductor layer being connected with the first electrode, a first gate electrode, a first gate insulating layer, and a second electrode above the first insulating layer, the second electrode being connected with the first oxide semiconductor layer; and a second transistor including a third electrode, a fourth electrode separated from the third electrode, a second oxide semiconductor layer between the third electrode and the fourth electrode, the second oxide semiconductor layer being connected with each of the third electrode and the fourth electrode, a second gate electrode, and a second gate insulating layer.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: December 26, 2017
    Assignee: Japan Display Inc.
    Inventor: Toshinari Sasaki
  • Publication number: 20170365624
    Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.
    Type: Application
    Filed: June 12, 2017
    Publication date: December 21, 2017
    Inventors: Toshinari Sasaki, Hajime Watakabe, Akihiro Hanada, Marina Shiokawa