Abstract: An adaptive array multiplies a radio signal received in four antennas by a received weight vector thereby separating a signal from each user. On the basis of the received signal and the received weight vector, a received power measuring circuit derives radio signal strength from each terminal. A transmit weight vector control part controls a transmit weight vector in response to the receive radio signal strength, i.e., the distance between a base station and each terminal, and reduces undesired interference with another cell by adjusting transmission power.

Abstract: A first pattern generating unit forms an adaptive array pattern using every antenna in a plurality of antennas. A second and third pattern generating unit respectively form adaptive array patterns for groups of antennas in the plurality of antennas using a different frequency for each group. A control unit switches between pattern formation by the first pattern generating unit and pattern formations by the second and third pattern generating units.

Abstract: A diversity reception device which weights in proportion to the reception level and combines a plurality of reception signals, includes a phase demodulator for demodulating the phase of the reception signal, a converter to output the sine and cosine elements of the reception signal, a sine element adder to add up sine element of each reception signal, and a cosine element adder to add up cosine element of each reception signal. The converter fetches and outputs predetermined values on sine and cosine elements of the reception signal upon input of the reception signal's reception level and phase data that is sent from phase demodulator. Therefore, the present device does not require expensive electronic circuits and can be made of small digital circuits suitable for IC including a memory.

Abstract: The diversity apparatus of the present invention includes: the detecting unit for detecting reception phase data for each symbol from a reception signal based on a standard carrier wave reproduced from the reception signal; the combining unit for combining respectively a plurality of I-components and a plurality of Q-components in the reception phase data; and the demodulating unit for obtaining digital symbol data respectively from a piece of combined I-component and a piece of combined Q-component. The detecting unit reproduces the standard carrier wave from the reception signal by referring to the symbol data. This construction provides stable reproduction of carrier waves since the diversity apparatus reproduces the standard carrier waves by using the demodulation data which is obtained from the reception data after diversity combination.

Abstract: A diversity reception device which weights in proportion to the reception level and combines a plurality of reception signals, includes a phase demodulator for demodulating the phase of the reception signal, a converter to output the sine and cosine elements of the reception signal, a sine element adder to add up sine element of each reception signal, and a cosine element adder to add up cosine element of each reception signal. The converter fetches and outputs predetermined values on sine and cosine elements of the reception signal upon input of the reception signal's reception level and phase data that is sent from phase demodulator. Therefore, the present device does not require expensive electronic circuits and can be made of small digital circuits suitable for IC including a memory.

Abstract: A diversity reception device which weights in proportion to the reception level and combines a plurality of reception signals, includes a phase demodulator for demodulating the phase of the reception signal, a converter to output the sine and cosine elements of the reception signal, a sine element adder to add up sine element of each reception signal, and a cosine element adder to add up cosine element of each reception signal. The converter fetches and outputs predetermined values on sine and cosine elements of the reception signal upon input of the reception signal's reception level and phase data that is sent from phase demodulator. Therefore, the present device does not require expensive electronic circuits and can be made of small digital circuits suitable for IC including a memory.

Abstract: A baseband signal generator according to the present invention performs differential encoding and mapping processings for a digital baseband signal and limits bandwidths of the obtained symbol mapping data of an I phase and a Q phase by digital filters. Each digital filter includes a circuit for accumulating symbol mapping data corresponding to a plurality of symbol sections, a plurality of ROMs provided corresponding to the plurality of symbol sections for storing symbol data corresponding to a predetermined filter waveform, and an adder for adding symbol data output from there ROMs. The adder outputs a digital baseband signal whose bandwidth is limited, which signal is converted into an analog baseband signal by a D/A converter and supplied to an analog modulation unit.

Abstract: A digital DQPSK modulator according to the present: invention limits respective bands of symbol mapping data of I phase and Q phase obtained by applying differential encoding and mapping processings to a digital baseband signal, and multiplies the obtained data by the carrier signals by means of the digital filter. Such limiting of the bands and multiplication by the carrier signals are carried out by the digital filter in a time-divisionally multiplexed manner. The digital filter includes a circuit, for accumulating symbol mapping data for each of the I phase and the Q phase corresponding to a plurality of symbol sections, a plurality of ROMs corresponding to the plurality of symbol sections for storing a multiplication result of symbol data corresponding to a predetermined filter waveform and the carrier signal, and an adder for adding data output from these ROMs. The adder outputs a digital modulated signal which is, in turn, converted into an analog modulated signal by a D/A converter.

Abstract: Apparatus for demodulating an incoming digitally phase modulated analog signal to reproduce symbol data carried by the signal. Specifically, the demodulator relies on first counting, on a free-running and modulo basis, pulses of a fixed-frequency reference clock signal to form a counted value. The incoming signal is converted to a one-bit phase modulated digital signal. At the occurrence of a pre-defined point in the one-bit phase modulated signal, typically a rising edge occurring at the symbol rate, the counted value is stored as phase information. Within each symbol period, a difference between current and immediately prior counted values, i.e. the latter being a current value but delayed by one symbol period, is determined. This difference, i.e. phase change data, is subsequently sampled and decoded to yield reproduced symbol data, as well as, used, through a phase locked loop, to generate a data clock and the symbol clock.

Abstract: A digital quadrature modulator having a first storage device for receiving an I phase component of a digital baseband signal and digital carrier phase information as a higher order address and a lower order address, respectively, and a second storage device for receiving a Q phase component of the digital baseband signal and the digital carrier phase information as a higher order address and a lower order address, respectively. The carrier phases of the carrier phase information applied to the first and the second storage devices are out of phase from each other by .pi./2. The first storage device outputs a multiplication result of the I phase component and a carrier signal and the second storage device outputs a multiplication result of the Q phase component and the carrier signal based on these addresses. These outputs are added to each other in a digital manner and then converted into an analog signal which is supplied as a modulated signal.

Abstract: A digital modulator includes a signal source for a digital baseband signal and a signal source for carrier phase information. The digital baseband signal is converted into amplitude information of an I phase, a Q phase, an I' phase and a Q' phase by a mapping circuit. The carrier phase information is converted into four phase information with phases shifted by shift registers to be out of phase by .pi./4 from each other. The digital modulator includes four ROM, each ROM outputting a multiplication result of the corresponding amplitude information and carrier signal based on the corresponding one of the four amplitude information as a higher order address and the corresponding one of the four phase information as a lower order address. These outputs are added to each other in a digital manner and then converted into an analog signal which is supplied as a modulated signal.