Patents by Inventor Toshio Adachi

Toshio Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7724088
    Abstract: A push-pull amplifier includes a voltage inversion circuit 9 that uses an output of the differential amplifier 1 as an input signal, and includes a set of resistors 7a, 7b, and a differential amplifier 8 for inverting the polarity of the input signal, a level shifting circuit 3 that shifts the level of an output signal of the voltage inversion circuit 9 to a prescribed level, while inverting the polarity of the output signal, and an output amplifier circuit 4 that includes complementary transistors which are different from each other in polarity. The transistors are inputted with the above-mentioned input signal and the output signal of the level shifting circuit 3, respectively for carrying out push-pull amplification.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: May 25, 2010
    Assignee: Asahi Kasei EMD Corporation
    Inventor: Toshio Adachi
  • Publication number: 20090066416
    Abstract: A push-pull amplifier is provided which, without depending on the overdrive voltage, can increase the peak value of the gate voltage for the output transistor to a level still higher than the conventional one, and is capable of producing an output current with low consumption current that is higher than that available with conventional push-pull amplifiers. The present invention includes a differential amplifier 1, a voltage buffer amplifier 2, a voltage inversion circuit 9, a level shifting circuit 3, and an output amplifier circuit 4. The voltage inversion circuit 9 uses an output of the differential amplifier 1 as an input signal, and includes a set of resistors 7a, 7b, and a differential amplifier 8 for inverting the polarity of the input signal. The level shifting circuit 3 shifts the level of an output signal of the voltage inversion circuit 9 to a prescribed level, while inverting the polarity of the output signal.
    Type: Application
    Filed: June 25, 2008
    Publication date: March 12, 2009
    Inventor: Toshio Adachi
  • Patent number: 7262662
    Abstract: The present invention is a folded cascode operational amplifier provided with a differential input portion 10, cascode current source portion 20, current mirror portion 30, output portion 40, and differential amplifier 50 serving as a differential amplifying portion. The differential input portion 10 has P-type MOS transistors M2 and M3 of a differential pair for respectively inputting a differential signal and the MOS transistors M2 and M3 are respectively provided with a well terminal. The differential amplifier 50 compares the source voltage of each of the MOS transistors M2 and M3 with a predetermined reference voltage Vref, generates an output voltage in accordance with the comparison result, and supplies the generated output voltage to well terminals as well voltages of the MOS transistors M2 and M3. An operational amplifier is provided which performs the rail-to-rail operation at a low voltage and in which an input current is zero.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: August 28, 2007
    Assignee: Asahi Kasei Microsystems Co., Ltd.
    Inventor: Toshio Adachi
  • Publication number: 20050231284
    Abstract: The present invention is a folded cascode operational amplifier provided with a differential input portion 10, cascode current source portion 20, current mirror portion 30, output portion 40, and differential amplifier 50 serving as a differential amplifying portion. The differential input portion 10 has P-type MOS transistors M2 and M3 of a differential pair for respectively inputting a differential signal and the MOS transistors M2 and M3 are respectively provided with a well terminal. The differential amplifier 50 compares the source voltage of each of the MOS transistors M2 and M3 with a predetermined reference voltage Vref, generates an output voltage in accordance with the comparison result, and supplies the generated output voltage to well terminals as well voltages of the MOS transistors M2 and M3. An operational amplifier is provided which performs the rail-to-rail operation at a low voltage and in which an input current is zero.
    Type: Application
    Filed: April 18, 2005
    Publication date: October 20, 2005
    Inventor: Toshio Adachi
  • Patent number: 6637008
    Abstract: In an electronic circuit being provided with a plurality of circuit elements and performing a specified function, a plurality of specific circuit elements related to a circuit performing the specified function out of the plurality of circuit elements are composed of circuit elements changing their element parameters according to values indicated by control signals. The electronic circuit is provided with a plurality of holding circuits for holding a plurality of control signals to be given to the plurality of specific circuit elements. The values of the plurality of control signals which these holding circuits hold are changed by external or internal apparatuses according to a probabilistic searching technique (for example genetic algorithms or simulated annealing algorithms) so that the function of the electronic circuit satisfies designated specifications.
    Type: Grant
    Filed: September 16, 1999
    Date of Patent: October 21, 2003
    Assignees: Agency of Industrial Science and Technology, Asahi Kasei Microsystems Co., Ltd.
    Inventors: Tetsuya Higuchi, Masahiro Murakawa, Yuji Kasai, Shogo Kiryu, Toshio Adachi, Shiro Suzuki
  • Patent number: 5700326
    Abstract: A microwave plasma processing apparatus comprises a vacuum processing chamber, a substrate disposed within the vacuum processing chamber, a microwave guide coupled to the vacuum processing chamber, and fins for dividing a microwave in the electric field direction. The length of fins are different such that the uniformity of the film thickness distribution on the substrate of large area can be improved.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: December 23, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazumasa Takatsu, Takashi Kurokawa, Hiroshi Echizen, Akio Koganei, Shuichiro Sugiyama, Toshio Adachi
  • Patent number: 5525379
    Abstract: The present invention relates to a process for manufacturing an optical recording medium comprising a substrate and a laminate of a recording film and an inorganic dielectric film thereon, and the optical recording medium. The process comprises forming the inorganic dielectric film by using a helicon wave plasma CVD method.
    Type: Grant
    Filed: August 10, 1995
    Date of Patent: June 11, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kunio Takada, Kazuoki Hongu, Akio Koganei, Toshimori Miyakoshi, Toshio Adachi
  • Patent number: 4987852
    Abstract: An apparatus for removing bubbles in paint comprises a sealed container having an upper section and a lower section divided by a plate having one or more slit-like through holes and a pressure reducing device connected to the lower section. A paint coating system includes the bubble removing apparatus, a tank for storing a new paint, a first pipe line to feed paint from the tank to the upper section of the sealed container, a curtain flow coater or a roll coater communicated with the lower section of the sealed container so as to receive paint without bubbles, and a vessel to collect paint which does not contribute to form a coating layer.
    Type: Grant
    Filed: July 12, 1989
    Date of Patent: January 29, 1991
    Assignees: Tomoharu Sakai, Dai Nippon Toryo Co., Ltd., Meishin Kabushiki Kaisha
    Inventors: Tomoharu Sakai, Eizo Yoshida, Hiroshi Mihara, Toshio Adachi
  • Patent number: 4950956
    Abstract: A plasma processing apparatus comprises a vacuum vessel, an anode and a cathode arranged in the vacuum vessel, and a discharge producing power source for intermittently producing main discharge between the anode and the cathode to process a substrate arranged in the proximity of the anode and the cathode. The discharge producing power source comprises a magnetic field setting device including magnetic coils arranged closely to the vacuum vessel and having pole pieces and alternate current power sources for the magnetic coils. The plasma processing apparatus is able to remarkably increase processing speeds and considerably reduce the temperature rise and damage therefrom of substrates to be processed. Moreover, the magnetic field setting device is arranged in a small size to make the plasma processing apparatus compact and small-sized.
    Type: Grant
    Filed: September 15, 1987
    Date of Patent: August 21, 1990
    Assignee: Anelva Corporation
    Inventors: Tatsuo Asamaki, Kiyoshi Hoshino, Katsumi Ukai, Yoichi Ino, Toshio Adachi, Tsutomu Tsukada
  • Patent number: 4816638
    Abstract: A vacuum processing apparatus comprising a load-lock chamber, a vacuum transferring chamber and a processing chamber respectively having evacuating systems for evacuating the respective chambers. The load-lock chamber has a first isolation valve for isolating and opening communication of the load-lock chamber with the atmosphere and a second isolating valve for isolating and opening communication of the load-lock chamber with the vacuum transferring chamber. The processing chamber comprises a vessel detachably located at an arranging aperture formed in a wall of the vacuum transferring chamber and closing the arranging aperture in an air-tight manner from the outside of the apparatus. A substrate arranging portion is arranged in the vacuum transferring chamber so as to be move toward and away from the vessel to form an air-tight chamber space in the vessel isolated from the vacuum transferring chamber when the substrate arranging portion has moved to the vessel.
    Type: Grant
    Filed: October 20, 1987
    Date of Patent: March 28, 1989
    Assignee: Anelva Corporation
    Inventors: Katsumi Ukai, Tsutomu Tsukada, Kouji Ikeda, Toshio Adachi
  • Patent number: 4751800
    Abstract: A dome-shaped roof structure for a large construction such as an athletic stadium is capable of partly opening according to the environmental conditions such as weather conditions. The dome-shaped roof structure includes a stationary roof section having a central opening and fixedly secured along an outer periphery thereof to the side wall of the large construction, and a movable roof section including a plurality of roof units corresponding to a plurality of divisions of the central opening and each capable of being radially moved between an open position where the roof unit is supported on the stationary roof section and a closed position where the roof unit is supported on a beam in the central opening.
    Type: Grant
    Filed: June 25, 1986
    Date of Patent: June 21, 1988
    Assignee: Ohbayashi-Gumi, Ltd.
    Inventors: Yukio Kida, Sunao Shotaka, Toshio Adachi, Toru Aoyagi, Shigeki Yamanaka
  • Patent number: 4706419
    Abstract: A dome-shaped roof structure for a large construction such as an athletic stadium is capable of being partly opening according to the environmental conditions such as the weather. The dome-shaped roof structure includes a dome-shaped stationary roof section having a central opening and fixedly secured at an outer periphery thereof to the external wall of the construction, and a plurality of movable roof units each having a shape to cover one of a plurality of divisions of the central opening and pivotably secured at one end thereof to a support located near the circumference of the central opening so as to be turned between a first position where the central opening is closed and a second position where the same is opened.
    Type: Grant
    Filed: June 25, 1986
    Date of Patent: November 17, 1987
    Assignee: Ohbayashi-Gumi, Ltd.
    Inventors: Toshio Adachi, Toru Aoyagi, Akihisa Kawaguchi, Shigeki Yamanaka
  • Patent number: 4684673
    Abstract: Here disclosed are surgical cements useful for filling defect parts and vacant part of bones and teeth, which comprises (a) self-hardening amorphous tricalcium phosphate powder, (b) a component (B) of a surgically acceptable water-soluble poly(carboxylic acid), and (c) water and which is prepared by mixing amorphous tricalcium phosphate powder, the component (B) and water or mixing amorphous tricalcium phosphate and an aqueous solution of the component (B), then kneading the mixture.
    Type: Grant
    Filed: July 1, 1985
    Date of Patent: August 4, 1987
    Assignee: Meishintoryo Co. Ltd.
    Inventor: Toshio Adachi
  • Patent number: 4432942
    Abstract: In apparatus for filling a container suitable for storage with radioactive solid wastes arising from atomic power plants or the like, a plasma arc is irradiated toward a portion of the wastes to melt the portion of the wastes; portions of the wastes are successively moved so as to be subjected to irradiation of the plasma arc to continuously melt the wastes; and the melts obtained by melting the wastes are permitted to flow down toward the bottom of the container.
    Type: Grant
    Filed: October 13, 1981
    Date of Patent: February 21, 1984
    Inventors: Toshio Adachi, Susumu Hiratake
  • Patent number: 4381233
    Abstract: There is presented a photoelectrolyzer comprising a number of minute solar cell elements suspended in an electrolyte. Each element is made of, for example, a first thin film of intrinsic amorphous silicon having specific properties and/or N-type amorphous silicon and a second thin film of a P-type amorphous silicon.This apparatus is high in the sunlight collection efficiency and also is capable of electrolyzing an electrolyte with high electrolysis voltage such as water.
    Type: Grant
    Filed: May 13, 1981
    Date of Patent: April 26, 1983
    Assignee: Asahi Kasei Kogyo Kabushiki Kaisha
    Inventors: Toshio Adachi, Tatsumi Arakawa
  • Patent number: 4341915
    Abstract: An apparatus for filling a container with radioactive solid wastes comprises a melting furnace for melting the wastes and a feed-in device for feeding the wastes into the melting furnace. The wastes introduced into the feed-in device through a charge port are fed laterally and fed from an inlet formed in the side wall of the melting furnace into the melting furnace. The wastes fed into the melting furnace are melted therein, and a resultant melt is poured from an outlet formed in the side wall of the melting furnace into a top-open container placed under the outlet.
    Type: Grant
    Filed: March 10, 1980
    Date of Patent: July 27, 1982
    Assignee: Daidotokushuko Kabushikikaisha
    Inventors: Toshio Adachi, Susumu Hiratake
  • Patent number: 4326842
    Abstract: A device for pulverizing incombustible large solid radioactive wastes arising from atomic power plants or the like. The device comprises a furnace body provided with a vacant space for melting radioactive wastes, a gripper mounted on the furnace body to support the radioactive waste, plasma torches mounted on the furnace body to irradiate a plasma arc toward the lower end of the wastes, and a water vessel disposed below the vacant space.
    Type: Grant
    Filed: January 24, 1980
    Date of Patent: April 27, 1982
    Assignee: Daidotokushuko Kabushikikaisha
    Inventors: Toshio Adachi, Susumu Hiratake
  • Patent number: 4271328
    Abstract: A photovoltaic device including a plurality of amorphous silicon unit cells each having a p-i-n structure layered in succession on a substrate made of stainless steel. A transparent electrically conductive layer, for withdrawing a photoelectromotive force in cooperation with the electrically conductive substrate, is formed on the uppermost unit cell, so that rays of light may be incident upon the photovoltaic device from the uppermost unit cell. Preferably, the thickness of the unit cells closer to the light incidence surface is selected to be less than the thickness of the unit cells farther from the light incident surface. Each of the unit cells is structured such that the n type, i type and p type layers are disposed in the above described order from the light incidence surface in terms of the impurity type.
    Type: Grant
    Filed: March 14, 1980
    Date of Patent: June 2, 1981
    Assignee: Yoshihiro Hamakawa
    Inventors: Yoshihiro Hamakawa, Hiroaki Okamoto, Yoshiteru Nitta, Toshio Adachi