Patents by Inventor Toshio Araki

Toshio Araki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8031283
    Abstract: An active matrix substrate according to one aspect of the present invention is a TFT array substrate including a TFT. The active matrix substrate includes a gate signal line electrically connected to a gate electrode of the TFT, a first insulating film formed above the gate signal line, an auxiliary capacitance electrode formed above the first insulating film and supplied with a common potential, a second insulating film formed above the auxiliary capacitance electrode, a source signal line formed above the second insulating film and electrically connected to a source electrode of the TFT, a third insulating film formed above the source signal line, and a pixel electrode formed above the third insulating film so that the pixel electrode overlaps with a part of the auxiliary capacitance electrode.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: October 4, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Toshio Araki, Osamu Miyakawa, Nobuaki Ishiga, Shingo Nagano
  • Patent number: 8017746
    Abstract: An object of the present invention is to provide a red or orange fluorescent protein, which is characterized in that the difference (stokes shift) between an excitation peak value (wavelength of maximum absorption) and a fluorescence peak value (wavelength of maximum fluorescence) is greatened, so that the maximum fluorescence can be obtained by the maximum excitation. The present invention provides a novel fluorescent protein monomerized by introducing a mutation into a florescent protein derived from Fungia sp., and a novel chromoprotein and fluorescent protein derived from Montipora. sp.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: September 13, 2011
    Assignees: Riken, Medical & Biological Laboratories Co., Ltd.
    Inventors: Atsushi Miyawaki, Takako Kogure, Hiroshi Hama, Masataka Kinjo, Kenta Saito, Satoshi Karasawa, Toshio Araki
  • Patent number: 7980906
    Abstract: A personal watercraft comprises an engine which is mounted in a body of the watercraft and is equipped with an open-loop water cooling system; a coolant passage in which water for cooling the engine flows; a water flow generator configured to operate in association with the engine to generate a water flow in the coolant passage; and a valve unit configured to restrict a flow of the water in the coolant passage.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: July 19, 2011
    Assignee: Kawasaki Jukogyo Kabushiki Kaisha
    Inventors: Atsufumi Ozaki, Yasuo Okada, Akio Miguchi, Hiroshi Yagii, Toshio Araki
  • Patent number: 7952670
    Abstract: According to an aspect of the present invention, there is provided a liquid crystal display that includes a gate electrode and line formed on a transparent insulating substrate, a gate insulating film covering the gate electrode and line, a semiconductor layer formed on the gate insulating film, a source electrode, a source line, and a drain electrode formed on the semiconductor layer, and a pixel electrode connected to the drain electrode. The semiconductor layer is integrally formed of three portions which are a crossover portion of the source line and the drain line, a TFT portion, and a connecting portion connecting the crossover portion to the TFT portion. A part of the crossover portion on the connecting portion side and the whole connecting portion are covered by the source electrode and the source line.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: May 31, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tadaki Nakahori, Hatsumi Kimura, Fumihiro Goto, Toshio Araki
  • Publication number: 20110012121
    Abstract: A display apparatus including a TFT array substrate on which TFTs are formed in an array, a counter substrate disposed so as to face the TFT array substrate, and a sealing pattern for adhering the TFT array substrate and the counter substrate to each other, wherein the counter substrate has a counter electrode, and the TFT array substrate has a first conductive layer, a first insulating film formed on the first conductive layer, a second conductive layer disposed so as to intersect the first conductive layer via the first insulating film, a second insulating film formed on the second conductive layer and having at least two layers, and common electrode wiring provided below the sealing pattern and electrically connected to the counter electrode by the sealing pattern, and the sealing pattern overlaps the second conductive layer via the second insulating film.
    Type: Application
    Filed: September 22, 2010
    Publication date: January 20, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: KAZUNORI INOUE, Harumi Murakami, Toshio Araki, Nobuaki Ishiga
  • Patent number: 7862954
    Abstract: The present invention relates to and provides a fuel cell in which sealing can be reliably made for each unit cell, thereby, enabling thinning, facilitating maintenance, and enabling miniaturization and weight reduction, and enabling free shape design. A fuel cell of the present invention is characterized by comprising a sheet-like solid polymer electrolyte 1 and a pair of electrode plates 2, 3 arranged on both sides of the solid polymer electrolyte 1, and further comprising a pair of metallic plates 4, 5 arranged on both sides of the electrode plates 2, 3, and provided flow path grooves 9, and inlets 4c, 5c and outlets communicating with the flow path grooves, wherein the peripheral edges of the metallic plates 4, 5 are mechanically sealed with an insulation material 6 interposed between the metallic plates.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: January 4, 2011
    Assignee: Aquafairy Corporation
    Inventors: Masaya Yano, Masakazu Sugimoto, Takuji Okeyui, Toshio Araki
  • Patent number: 7847910
    Abstract: A display panel according to the present invention includes: a common wiring (4) formed above a TFT array substrate (30) and having a first terminal (5); a first transparent conductive film (6) formed above the common wiring (4); an interlayer insulating film (15) formed above the first transparent conductive film (6) and having a first terminal portion contact hole (17) formed outside a display area (54) and inside a sealing material (50); and a terminal pad (20) formed above the interlayer insulating film (15) and electrically connected to the common wiring (4) through the first transparent conductive film (6) in the first terminal portion contact hole (17).
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: December 7, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Osamu Miyakawa, Toshio Araki
  • Patent number: 7816693
    Abstract: According to an aspect of the present invention, there is provided a display apparatus including a TFT array substrate on which TFTs are formed in an array, a counter substrate disposed so as to face the TFT array substrate, and a sealing pattern for adhering the TFT array substrate and the counter substrate to each other, wherein the counter substrate comprises a counter electrode, and the TFT array substrate comprises a first conductive layer, a first insulating film formed on the first conductive layer, a second conductive layer disposed so as to intersect the first conductive layer via the first insulating film, a second insulating film formed on the second conductive layer and having at least two layers, and common electrode wiring provided below the sealing pattern and electrically connected to the counter electrode by the sealing pattern, and the sealing pattern overlaps the second conductive layer via the second insulating film.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: October 19, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Harumi Murakami, Toshio Araki, Nobuaki Ishiga
  • Patent number: 7799621
    Abstract: A method of manufacturing a thin film transistor array substrate according to the present invention includes: forming a pattern made of a first conductive film; stacking a gate insulating film, a semiconductor layer, and a resist in the stated order; forming a resist pattern having a step structure in a thickness direction; forming an exposed area of the first conductive film and a pattern of the semiconductor layer by using the resist pattern; forming a pattern made of a second conductive film in contact with the first conductive film in the exposed area of the first conductive film; and forming a pattern made of a third conductive film. The first conductive film forms a gate electrode, and the second conductive film forms each of a source electrode and a drain electrode. The third conductive film forms a pixel electrode, and the second conductive film is coated with an upper-layer film.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: September 21, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yasuyoshi Itoh, Toshio Araki
  • Patent number: 7770957
    Abstract: A seat apparatus for a vehicle, which includes an inner slide rail, an outer slide rail including an outer upper rail and an outer lower rail, a seat cushion provided slidably in a longitudinal direction of the vehicle and configured to be flipped up to a wall portion of the vehicle compartment to be in a storage position, a hinge mechanism fixing the outer upper rail to the seat cushion, a bearing smoothly sliding the outer upper rail relative to the outer lower rail, a spring provided around a rotational shaft of the hinge mechanism for biasing the seat cushion in a direction to be flipped up, and at least one rotating member provided between the outer upper rail and the outer lower rail so as to receive a load in a lateral direction of the vehicle applied to the outer upper rail by the spring.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: August 10, 2010
    Assignees: Aisin Seiki Kabushiki Kaisha, Toyota Boshoku Kabushiki Kaisha
    Inventors: Kenji Maeda, Toshiyuki Tanaka, Katsuaki Suzuki, Motohisa Nakamura, Takashi Mukoujima, Eiji Mizutani, Toshio Araki
  • Publication number: 20100167607
    Abstract: A personal watercraft comprises an engine which is mounted in a body of the watercraft and is equipped with an open-loop water cooling system; a coolant passage in which water for cooling the engine flows; a water flow generator configured to operate in association with the engine to generate a water flow in the coolant passage; and a valve unit configured to restrict a flow of the water in the coolant passage.
    Type: Application
    Filed: December 29, 2008
    Publication date: July 1, 2010
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Atsufumi Ozaki, Yasuo Okada, Akio Miguchi, Hiroshi Yagii, Toshio Araki
  • Publication number: 20100077997
    Abstract: An engine unit includes an engine body, and a supercharging machine having a main body. The main body of the supercharging machine is coupled to the engine body via a component or a member disposed therebetween.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 1, 2010
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventor: Toshio Araki
  • Publication number: 20100082214
    Abstract: A driving control system includes a controller which is configured to, in response to a command for starting an auto-cruise mode generated by the operation of an input device, control an engine speed or a vehicle speed so that a value detected by a speed detector falls within a cruising speed range, when the value detected by the speed detector is outside the cruising speed range; and to then cause the watercraft to cruise at a constant engine speed or at a constant vehicle speed.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 1, 2010
    Applicant: Kawasaki Jukogyo Kabushiki Kaisha
    Inventors: Toshio ARAKI, Atsufumi OZAKI, Satoru WATABE
  • Patent number: 7671939
    Abstract: A liquid crystal display element includes: a first substrate having a first surface and including a pixel electrode; a second substrate having a second surface opposing to the first surface, and including a light-shielding film, a thickness adjusting film and a counter electrode arranged in sequence in a direction to the second surface; a sealing material having a frame-shape to bond the first substrate and the second substrate; a liquid crystal layer provided in a region surrounded by the sealing material and between the first substrate and the second substrate, wherein the thickness adjusting film is provided to cover the light-shielding film to define the thickness of the liquid crystal layer, and has a contact hole, wherein the counter electrode is provided to oppose to the pixel electrode, and electrically connected to the light shielding film via the contact hole.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: March 2, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Toshio Araki, Makoto Hirakawa, Tomoki Nakamura
  • Publication number: 20090250244
    Abstract: A transparent conductive film having a multilayer film of two or more layers (a pixel electrode, a gate terminal pad, and a source terminal pad) includes a first transparent conductive film having an amorphous structure, and a second transparent conductive film, formed over the first transparent conductive film, and having a crystalline structure.
    Type: Application
    Filed: April 7, 2009
    Publication date: October 8, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kumi TSUDA, Toshio Araki
  • Publication number: 20090207362
    Abstract: The liquid crystal display device, in which liquid crystal is filled between a TFT array substrate having a TFT and a counter substrate placed opposite to the TFT array substrate, includes a pixel electrode placed at least partly directly over or under a drain electrode of the thin film transistor so as to directly overlap the drain electrode, an interlayer insulating layer placed to cover the pixel electrode, and a counter electrode placed on the interlayer insulating layer and having a slit to generate a fringe electric field with the pixel electrode, wherein the counter electrode is placed to overlap a gate line connected to a gate electrode of the TFT in at least part of area and connected to the counter electrode in an adjacent pixel across the gate line.
    Type: Application
    Filed: February 11, 2009
    Publication date: August 20, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shingo NAGANO, Yuichi Masutani, Toshio Araki, Osamu Miyakawa
  • Publication number: 20090195723
    Abstract: An active matrix substrate according to one aspect of the present invention is a TFT array substrate including a TFT. The active matrix substrate includes a gate signal line electrically connected to a gate electrode of the TFT, a first insulating film formed above the gate signal line, an auxiliary capacitance electrode formed above the first insulating film and supplied with a common potential, a second insulating film formed above the auxiliary capacitance electrode, a source signal line formed above the second insulating film and electrically connected to a source electrode of the TFT, a third insulating film formed above the source signal line, and a pixel electrode formed above the third insulating film so that the pixel electrode overlaps with a part of the auxiliary capacitance electrode.
    Type: Application
    Filed: January 14, 2009
    Publication date: August 6, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Toshio Araki, Osamu Miyakawa, Nobuaki Ishiga, Shingo Nagano
  • Publication number: 20090121227
    Abstract: A method of manufacturing a thin film transistor array substrate according to the present invention includes: forming a pattern made of a first conductive film; stacking a gate insulating film, a semiconductor layer, and a resist in the stated order; forming a resist pattern having a step structure in a thickness direction; forming an exposed area of the first conductive film and a pattern of the semiconductor layer by using the resist pattern; forming a pattern made of a second conductive film in contact with the first conductive film in the exposed area of the first conductive film; and forming a pattern made of a third conductive film. The first conductive film forms a gate electrode, and the second conductive film forms each of a source electrode and a drain electrode. The third conductive film forms a pixel electrode, and the second conductive film is coated with an upper-layer film.
    Type: Application
    Filed: November 6, 2008
    Publication date: May 14, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yasuyoshi ITOH, Toshio Araki
  • Patent number: 7514712
    Abstract: A pixel electrode is disposed to cover the inner surfaces of a pixel-drain contact hole passing through a third insulating film and a second insulating film to reach a drain electrode. At the bottom of the pixel-drain contact hole, the pixel electrode is electrically connected with the drain electrode through a contact conductor film. The pixel-drain contact hole is formed of a connection of a contact hole passing through the second insulating film and a contact hole passing through the third insulating film. The dimensions of the opening end of the contact hole are larger than its dimensions at the bottom, and thus the inner surfaces of the contact hole are smoothly sloped and shaped like a crater in cross section.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: April 7, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshio Araki
  • Publication number: 20090016001
    Abstract: A display panel according to the present invention includes: a common wiring (4) formed above a TFT array substrate (30) and having a first terminal (5); a first transparent conductive film (6) formed above the common wiring (4); an interlayer insulating film (15) formed above the first transparent conductive film (6) and having a first terminal portion contact hole (17) formed outside a display area (54) and inside a sealing material (50); and a terminal pad (20) formed above the interlayer insulating film (15) and electrically connected to the common wiring (4) through the first transparent conductive film (6) in the first terminal portion contact hole (17).
    Type: Application
    Filed: July 9, 2008
    Publication date: January 15, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Osamu MIYAKAWA, Toshio Araki