Patents by Inventor Toshio Denta

Toshio Denta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230402334
    Abstract: A frame body includes reinforcing portions. The reinforcing portions are each provided in the region formed by a side frame and one of a pair of attachment frames in plan view. Each reinforcing portion is in contact with the side frame, the one of the pair of attachment frames, and the corner at which the side frame and one of the pair of attachment frames are joined.
    Type: Application
    Filed: April 24, 2023
    Publication date: December 14, 2023
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Toshio DENTA
  • Publication number: 20230109985
    Abstract: A semiconductor module, including a semiconductor chip, a sealed main body portion sealing the semiconductor chip and having a pair of attachment holes penetrating therethrough, a heat dissipation plate in contact with the sealed main body portion. The heat dissipation plate is positioned between the attachment holes in a plan view of the semiconductor module. The semiconductor module further includes a pair of rear surface supporting portions and/or a pair of front surface supporting portions protruding respectively from rear and front surfaces of the sealed main body portion. In the plan view, the heat dissipation plate is formed between the pair of attachment holes, which are in turn between the pair of rear surface supporting portions. The pair of front surface supporting portions are formed substantially between the pair of attachment holes in the plan view.
    Type: Application
    Filed: August 29, 2022
    Publication date: April 13, 2023
    Applicant: Fuji Electric Co., Ltd.
    Inventor: Toshio DENTA
  • Patent number: 11456285
    Abstract: A semiconductor device, including a substrate having an insulating layer and a plurality of circuit patterns formed on the insulating layer, the substrate having a principal surface on which an element region is set. The semiconductor device further includes a plurality of semiconductor elements provided on the plurality of circuit patterns in the element region, a plurality of main terminals that each have a first end joined to one of the plurality of circuit patterns in the element region and a second end extending out of the substrate from a first side of the substrate, a plurality of control terminals disposed in a control region that is adjacent to a second side of the substrate opposite the first side, and a sealing member that seals the principal surface and the control region.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: September 27, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Toshio Denta, Masanori Tanaka
  • Patent number: 11177224
    Abstract: A flat plate frame is formed, which is flat plate-shaped, which has an opening penetrating its front and rear surfaces and groove terminal patterns formed on its front surface, and which contains a semi-cured thermosetting resin. Then, an insulating substrate is disposed on the rear surface so as to cover the opening of the flat plate frame, external connection terminals are disposed on the terminal patterns, and heating is carried out. As a result, a terminal package to which the insulating substrate and external connection terminals are firmly joined is produced using the flat plate frame. The external connection terminals included in the terminal package are reliably and firmly joined to the terminal package. Therefore, the external connection terminals are not displaced when wires are bonded to the external connection terminals.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: November 16, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Toshio Denta, Yuji Ichimura
  • Publication number: 20210066258
    Abstract: A semiconductor device, including a substrate having an insulating layer and a plurality of circuit patterns formed on the insulating layer, the substrate having a principal surface on which an element region is set. The semiconductor device further includes a plurality of semiconductor elements provided on the plurality of circuit patterns in the element region, a plurality of main terminals that each have a first end joined to one of the plurality of circuit patterns in the element region and a second end extending out of the substrate from a first side of the substrate, a plurality of control terminals disposed in a control region that is adjacent to a second side of the substrate opposite the first side, and a sealing member that seals the principal surface and the control region.
    Type: Application
    Filed: June 23, 2020
    Publication date: March 4, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Toshio DENTA, Masanori TANAKA
  • Publication number: 20200357753
    Abstract: A flat plate frame is formed, which is flat plate-shaped, which has an opening penetrating its front and rear surfaces and groove terminal patterns formed on its front surface, and which contains a semi-cured thermosetting resin. Then, an insulating substrate is disposed on the rear surface so as to cover the opening of the flat plate frame, external connection terminals are disposed on the terminal patterns, and heating is carried out. As a result, a terminal package to which the insulating substrate and external connection terminals are firmly joined is produced using the flat plate frame. The external connection terminals included in the terminal package are reliably and firmly joined to the terminal package. Therefore, the external connection terminals are not displaced when wires are bonded to the external connection terminals.
    Type: Application
    Filed: March 31, 2020
    Publication date: November 12, 2020
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Toshio DENTA, Yuji ICHIMURA
  • Patent number: 10192806
    Abstract: A semiconductor device includes an insulating substrate having a metal plate, an insulating resin plate, and a circuit plate laminated in order; a semiconductor element fixed to the circuit plate; a wiring member connected to an electrode disposed on a front surface of the semiconductor element or to the circuit plate of the insulating substrate; a housing accommodating the insulating substrate, the semiconductor element, and the wiring member; and a sealing material including a thermosetting resin, and sealing the insulating substrate, the semiconductor element, and the wiring member accommodated in the housing. The circuit plate of the insulating substrate is selectively formed on the insulating resin plate as a combination of a circuit pattern with a sealing material adhering pattern.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: January 29, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Nishijima, Takashi Katsuki, Toshio Denta
  • Patent number: 9905490
    Abstract: Provided is a semiconductor device including an insulating substrate on which a semiconductor chip is mounted and a case that is adhered to the insulating substrate. The case includes a recess portion that is provided with an adhesive agent and into which a front surface side of the insulating substrate is inserted. The insulating substrate includes, in a side surface along a thickness direction, a front-side notched portion formed on the front surface side and a back-side notched portion formed on a back surface side. Length from a peak located between the front-side notched portion and the back-side notched portion to the front surface in the thickness direction is greater than or equal to 30% of an less than or equal to 70% of length of the recess portion of the case in the thickness direction.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: February 27, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Toshio Denta
  • Patent number: 9728475
    Abstract: A miniaturized semiconductor device includes a frame body having an opening region formed in a central portion, an insulating substrate which is provided in the opening region of the frame body and on which semiconductor chips are mounted, lead portions, each including an inclined portion that is at least partially exposed to the opening region formed in the frame body and extends so as to be inclined with respect to an end surface forming the opening region, and a bonding wire that is bonded between the lead portion and the semiconductor chip by ultrasonic bonding.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: August 8, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Tadanori Yamada, Toshio Denta, Tomonori Seki
  • Publication number: 20170186657
    Abstract: Provided is a semiconductor device including an insulating substrate on which a semiconductor chip is mounted and a case that is adhered to the insulating substrate. The case includes a recess portion that is provided with an adhesive agent and into which a front surface side of the insulating substrate is inserted. The insulating substrate includes, in a side surface along a thickness direction, a front-side notched portion formed on the front surface side and a back-side notched portion formed on a back surface side. Length from a peak located between the front-side notched portion and the back-side notched portion to the front surface in the thickness direction is greater than or equal to 30% of an less than or equal to 70% of length of the recess portion of the case in the thickness direction.
    Type: Application
    Filed: October 28, 2016
    Publication date: June 29, 2017
    Inventor: Toshio DENTA
  • Publication number: 20160300778
    Abstract: A semiconductor device includes an insulating substrate having a metal plate, an insulating resin plate, and a circuit plate laminated in order; a semiconductor element fixed to the circuit plate; a wiring member connected to an electrode disposed on a front surface of the semiconductor element or to the circuit plate of the insulating substrate; a housing accommodating the insulating substrate, the semiconductor element, and the wiring member; and a sealing material including a thermosetting resin, and sealing the insulating substrate, the semiconductor element, and the wiring member accommodated in the housing. The circuit plate of the insulating substrate is selectively formed on the insulating resin plate as a combination of a circuit pattern with a sealing material adhering pattern.
    Type: Application
    Filed: June 13, 2016
    Publication date: October 13, 2016
    Inventors: Takahiro NISHIJIMA, Takashi KATSUKI, Toshio DENTA
  • Patent number: 9431326
    Abstract: In a semiconductor device, semiconductor chips and lead frames are soldered at the same time on an insulating circuit board by one reflow soldering, and the positions of the externally led out lead frames undergo no change. In manufacturing the semiconductor device, after power semiconductor chips and control ICs are mounted on an insulating circuit board, and lead frames are disposed thereon, the semiconductor chips and lead frames are soldered at the same time on the insulating circuit board by one reflow soldering. Furthermore, after a primary bending work is carried out on the lead frames, and a terminal case is mounted over the insulating circuit board, a secondary bending work is carried out on the lead frames.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: August 30, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Toshio Denta, Tadanori Yamada, Eiji Mochizuki
  • Patent number: 9406576
    Abstract: A miniaturized semiconductor device includes a frame body having an opening region formed in a central portion, an insulating substrate which is provided in the opening region of the frame body and on which semiconductor chips are mounted, lead portions, each including an inclined portion that is at least partially exposed to the opening region formed in the frame body and extends so as to be inclined with respect to an end surface forming the opening region, and a bonding wire that is bonded between the lead portion and the semiconductor chip by ultrasonic bonding.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: August 2, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Tadanori Yamada, Toshio Denta, Tomonori Seki
  • Publication number: 20160211202
    Abstract: A miniaturized semiconductor device includes a frame body having an opening region formed in a central portion, an insulating substrate which is provided in the opening region of the frame body and on which semiconductor chips are mounted, lead portions, each including an inclined portion that is at least partially exposed to the opening region formed in the frame body and extends so as to be inclined with respect to an end surface forming the opening region, and a bonding wire that is bonded between the lead portion and the semiconductor chip by ultrasonic bonding.
    Type: Application
    Filed: March 31, 2016
    Publication date: July 21, 2016
    Inventors: Tadanori YAMADA, Toshio DENTA, Tomonori SEKI
  • Patent number: 9379096
    Abstract: A semiconductor device includes a plurality of semiconductor elements; first semiconductor chips including first semiconductor elements, the first semiconductor elements being defined as semiconductor elements in the plurality of semiconductor elements and having a current flowing greater than that of the other semiconductor elements; second semiconductor chips having second semiconductor elements, the second semiconductor elements being defined as semiconductor elements in the plurality of semiconductor elements for controlling the first semiconductor elements; an insulating substrate having a first wiring pattern bonded with the first semiconductor chips; and an insulating member having a second wiring pattern mounted with the second semiconductor chips.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: June 28, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Toshio Denta, Tomonori Seki, Tadanori Yamada, Tadahiko Sato
  • Publication number: 20150187669
    Abstract: A miniaturized semiconductor device includes a frame body having an opening region formed in a central portion, an insulating substrate which is provided in the opening region of the frame body and on which semiconductor chips are mounted, lead portions, each including an inclined portion that is at least partially exposed to the opening region formed in the frame body and extends so as to be inclined with respect to an end surface forming the opening region, and a bonding wire that is bonded between the lead portion and the semiconductor chip by ultrasonic bonding.
    Type: Application
    Filed: March 12, 2015
    Publication date: July 2, 2015
    Inventors: Tadanori YAMADA, Toshio DENTA, Tomonori SEKI
  • Patent number: 9064818
    Abstract: A semiconductor device includes an insulating circuit substrate mounted with at least one semiconductor element; a resin case having a bottom surface portion attached with the insulating circuit substrate and a side surface portion enclosing a periphery of the bottom surface portion; a lead molded integrally with the resin case and provided on a periphery of the insulating circuit substrate to be positioned on a surface of the bottom surface portion inside the resin case, the lead partially extending from inside the resin case to outside the resin case; and a sealing resin filled inside the resin case. A depressed portion is formed on two sides of the lead along a peripheral edge of the bottom surface portion inside the resin case.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: June 23, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Toshio Denta, Tomonori Seki, Tadanori Yamada, Tadahiko Sato
  • Publication number: 20140374889
    Abstract: A semiconductor device includes a plurality of semiconductor elements; first semiconductor chips including first semiconductor elements, the first semiconductor elements being defined as semiconductor elements in the plurality of semiconductor elements and having a current flowing greater than that of the other semiconductor elements; second semiconductor chips having second semiconductor elements, the second semiconductor elements being defined as semiconductor elements in the plurality of semiconductor elements for controlling the first semiconductor elements; an insulating substrate having a first wiring pattern bonded with the first semiconductor chips; and an insulating member having a second wiring pattern mounted with the second semiconductor chips.
    Type: Application
    Filed: September 11, 2014
    Publication date: December 25, 2014
    Inventors: Toshio DENTA, Tomonori SEKI, Tadanori YAMADA, Tadahiko SATO
  • Publication number: 20140231975
    Abstract: A semiconductor device includes an insulating circuit substrate mounted with at least one semiconductor element; a resin case having a bottom surface portion attached with the insulating circuit substrate and a side surface portion enclosing a periphery of the bottom surface portion; a lead molded integrally with the resin case and provided on a periphery of the insulating circuit substrate to be positioned on a surface of the bottom surface portion inside the resin case, the lead partially extending from inside the resin case to outside the resin case; and a sealing resin filled inside the resin case. A depressed portion is formed on two sides of the lead along a peripheral edge of the bottom surface portion inside the resin case.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 21, 2014
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Toshio DENTA, Tomonori SEKI, Tadanori YAMADA, Tadahiko SATO
  • Publication number: 20130334672
    Abstract: In a semiconductor device, semiconductor chips and lead frames are soldered at the same time on an insulating circuit board by one reflow soldering, and the positions of the externally led out lead frames undergo no change. In manufacturing the semiconductor device, after power semiconductor chips and control ICs are mounted on an insulating circuit board, and lead frames are disposed thereon, the semiconductor chips and lead frames are soldered at the same time on the insulating circuit board by one reflow soldering. Furthermore, after a primary bending work is carried out on the lead frames, and a terminal case is mounted over the insulating circuit board, a secondary bending work is carried out on the lead frames.
    Type: Application
    Filed: March 30, 2012
    Publication date: December 19, 2013
    Applicant: FUJI ELECTRIC CO., LTD
    Inventors: Toshio Denta, Tadanori Yamada, Eiji Mochizuki