Patents by Inventor Toshio Hatsuda

Toshio Hatsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5365400
    Abstract: Disclosed are heat sinks particularly effective in cooling semiconductors of a high heat dissipating density and including a multiplicity of tabular fins laminated via spacers and having through-holes pierced in their central parts, the holes admitting introduction of cooling fluids which radially flow in between the fins. The cooling fluids are supplied to the respective heat sinks attached to the multiplicity of semiconductors mounted on a board. In a specific form of the invention, the semiconductor cooling device has a heat sink provided with parallel tabular internal fins and a cooling fluid nozzle having an elongated opening substantially orthogonal to the fins, the nozzle being disposed to span over the parallel tabular fins substantially at longitudinal mid portions of these fins, so that the cooling fluid is evenly distributed from the mid portions of the fins to both longitudinal ends of the fins.
    Type: Grant
    Filed: October 4, 1991
    Date of Patent: November 15, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Noriyuki Ashiwake, Takahiro Daikoku, Toshio Hatsuda, Shizuo Zushi, Satomi Kobayashi
  • Patent number: 5276586
    Abstract: A semiconductor module comprises a substrate, a plurality of semiconductor chips mounted on the substrate, a plurality of heat conduction members mounted on the back surfaces of the plurality of semiconductor chips, respectively, and a cooling jacket, on which the plurality of heat conduction members are bonded with heat conductive bonding agent, sealed with the substrate, wherein, in a surface of each of the plurality of heat conduction members adjacent to the cooling jacket and in a surface of the cooling jacket adjacent to the heat conduction members, around a portion corresponding to the back surface of each of the semiconductor chip is formed a portion which has non-affinity for the heat conductive bonding agent. Further, it is preferred that a reservoir having an affinity for the heat conductive bonding agent and serving to receive an excessive bonding agent is formed around each of the non-affinity portions of the plurality of heat conduction members and the cooling jacket.
    Type: Grant
    Filed: April 22, 1992
    Date of Patent: January 4, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Hatsuda, Takahiro Daikoku, Tetsuya Hayashida, Noriyuki Ashiwake, Fumiyuki Kobayashi, Keizou Kawamura, Sohji Sakata
  • Patent number: 5270572
    Abstract: A semiconductor cooling unit for directly jetting a cooling medium against surfaces of semiconductor devices for use in a high-speed computer or the like to effectively remove heat from the semiconductor devices, in which partition members for partitioning a space into regions where semiconductor devices are placed. Each partitioned region has an opening at its ceiling side, and a pipe for supplying or discharging the cooling medium through the opening is disposed so as to project toward a central portion of the back surface of each semiconductor device. This pipe is utilized to also section a cooling medium supply header or a cooling medium return header so that bubbles generated from the semiconductor device surfaces can be smoothly removed, and so that the cooling medium can flow smoothly onto the semiconductor devices.
    Type: Grant
    Filed: June 24, 1992
    Date of Patent: December 14, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Tadakatsu Nakajima, Shigeo Ohashi, Heikichi Kuwahara, Noriyuki Ashiwake, Motohiro Sato, Toshio Hatsuda, Takahiro Daikoku, Toshio Hatada, Shigeyuki Sasaki, Hiroshi Inouye, Atsuo Nishihara, Kenichi Kasai
  • Patent number: 5089936
    Abstract: In a semiconductor module including a wiring substrate having one or a plurality of semiconductor devices electrically connected thereon, a housing constituted of a sealing frame and a ceiling board to enclose the semiconductor devices therein, and a cooling jacket to cool the semiconductor devices. The semiconductor module comprises an elastic arm placed on the cooling jacket for exerting pressure to cause the cooling jacket to be uniformly contacted with the housing ceiling board, and clamping jigs press the cooling jacket and the ceiling board through the elastic arm, so that the clamping jigs may serve to press the respective intermediate positions of the four sides of the cooling jacket through the elastic arm, or screw fasteners may be provided on the elastic arm for controlling the displacements and pressing force.
    Type: Grant
    Filed: September 7, 1989
    Date of Patent: February 18, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Kojima, Toshio Hatsuda, Takahiro Daikoku, Shizuo Zushi, Fumiyuki Kobayashi
  • Patent number: 4942452
    Abstract: A lead frame and a semiconductor device wherein a through hole is formed in the center of a semiconductor chip-mounting surface of a chip pad at the center of the lead frame, the through hole being tapered or being one which corresponds to a surface area that is greater on the surface of the chip-mounting surface of the chip pad than on the surface of the side opposite to the chip-mounting surface thereof. This prevents the occurrence of cracks in the sealing plastic portion in the step of reflow soldering of the lead frame to the substrate.
    Type: Grant
    Filed: February 22, 1988
    Date of Patent: July 17, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Kitano, Sueo Kawai, Asao Nishimura, Hideo Miura, Akihiro Yaguchi, Chikako Kitabayashi, Ichio Shimizu, Toshio Hatsuda, Toshinori Ozaki, Toshio Hattori, Souji Sakata
  • Patent number: RE37690
    Abstract: A lead frame and a semiconductor device wherein a through hole is formed in the center of a semiconductor chip-mounting surface of a chip pad at the center of the lead frame, the through hole being tapered or being one which corresponds to a surface area that is greater on the surface of the chip-mounting surface of the chip pad than on the surface of the side opposite to the chip-mounting surface thereof. This prevents the occurrence of cracks in the sealing plastic portion in the step of reflow soldering of the lead frame to the substrate.
    Type: Grant
    Filed: May 24, 1995
    Date of Patent: May 7, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Kitano, Sueo Kawai, Asao Nishimura, Hideo Miura, Akihiro Yaguchi, Chikako van Koten nee Kitabayashi, Ichio Shimizu, Toshio Hatsuda, Toshinori Ozaki, Toshio Hattori, Souji Sakata