Patents by Inventor Toshio Ishizaki

Toshio Ishizaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6529096
    Abstract: A dielectric filter including a plurality of resonators, and at least one transmission line provided among said plurality of resonators. A band rejection characteristic is formed around a resonance frequency of the resonator, and a line length of the transmission line is shorter than ¼ of a wavelength corresponding to the resonance frequency of the resonator.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: March 4, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomoya Maekawa, Hiroshi Kushitani, Hiroshi Shigemura, Toru Yamada, Toshio Ishizaki, Hideaki Nakakubo
  • Publication number: 20030025572
    Abstract: An antenna duplexer has
    Type: Application
    Filed: July 25, 2002
    Publication date: February 6, 2003
    Inventors: Tomoya Maekawa, Hiroyuki Nakamura, Toru Yamada, Toshio Ishizaki
  • Patent number: 6515559
    Abstract: A small in-band-flat-group-delay type dielectric filter having low-loss characteristics with a small amplitude deviation and uniform-group-delay frequency characteristics is obtained, which enables broad-band characteristics to be obtained easily. The in-band-flat-group-delay type dielectric filter includes a plurality of dielectric coaxial resonators, a coupling circuit comprising a combination of reactive elements, with which the dielectric coaxial resonators are coupled to one another, and input/output terminals connected to ends of the coupling circuit. The dielectric coaxial resonators coupled to the input/output terminals are allowed to have a different characteristic impedance from that of the inter-stage dielectric coaxial resonators.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: February 4, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd
    Inventors: Takehiko Yamakawa, Toru Yamada, Toshio Ishizaki, Minoru Tachibana, Toshiaki Nakamura, Hiroyuki Nakamatsu
  • Publication number: 20030020569
    Abstract: By using a method for manufacturing a dielectric laminated device, an opening is formed on a first dielectric sheet, a strip line and an input and output line including an input and output electrode are formed by burying electrode materials in said opening, the first dielectric sheet is laminated with the second and third dielectric sheets disposed above and below respectively to form a laminate, a first and second shield electrodes and a ground electrode are formed, an end of the strip line is connected to the ground electrode, the first shield electrode and the second shield electrode are mutually connected through the ground electrode, and the input and output electrode is exposed along the line direction of the strip line. By this constitution of the above dielectric laminated device, the mounting reliability of the dielectric laminated device can be further increased.
    Type: Application
    Filed: September 24, 2002
    Publication date: January 30, 2003
    Inventors: Hideaki Nakakubo, Toshio Ishizaki, Toru Yamada, Hiroshi Kagata, Tatsuya Inoue, Shoichi Kitazawa
  • Patent number: 6510607
    Abstract: By using a method for manufacturing a dielectric laminated device, an opening is formed on a first dielectric sheet, a strip line and an input and output line including an input and output electrode are formed by burying electrode materials in said opening, the first dielectric sheet is laminated with the second and third dielectric sheets disposed above and below respectively to form a laminate, a first and second shield electrodes and a ground electrode are formed, an end of the strip line is connected to the ground electrode, the first shield electrode and the second shield electrode are mutually connected through the ground electrode, and the input and output electrode is exposed along the line direction of the strip line. By this constitution of the above dielectric laminated device, the mounting reliability of the dielectric laminated device can be further increased.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: January 28, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideaki Nakakubo, Toshio Ishizaki, Toru Yamada, Hiroshi Kagata, Tatsuya Inoue, Shoichi Kitazawa
  • Publication number: 20020186757
    Abstract: An antenna duplexer has an antenna terminal;
    Type: Application
    Filed: February 27, 2002
    Publication date: December 12, 2002
    Inventors: Hiroyuki Nakamura, Toshio Ishizaki, Hisashi Adachi, Makoto Sakakura, Hiroaki Kosugi, Hiroyuki Itokawa, Toshiaki Nakamura
  • Publication number: 20020167372
    Abstract: A high-frequency filter device including at least one filter to be connected to a high-frequency stage of a wireless apparatus, in which the filter includes a voltage-controlled variable frequency resonance element which comprises a resonance element and a voltage-controlled variable impedance element electrically connected to the resonance element. In the high-frequency filter device, which is connected to a receiver-side antenna, a signal monitoring section monitors unnecessary interfering signals of a received signal of a receiver of the wireless apparatus and generates a control signal for reception by an adaptive control algorithm, and a control section controls a band elimination filter by a control voltage signal based on the control signal so that an elimination band of the band elimination filter of the receiving filter maximizes a ratio of a desired received signal to interfering waves.
    Type: Application
    Filed: September 28, 2001
    Publication date: November 14, 2002
    Inventors: Toshio Ishizaki, Toru Yamada
  • Publication number: 20020158715
    Abstract: A surface acoustic wave filter has a piezoelectric substrate and at least two interdigital transducer electrodes on the piezoelectric substrate,
    Type: Application
    Filed: April 1, 2002
    Publication date: October 31, 2002
    Inventors: Hiroyuki Nakamura, Toru Yamada, Kazunori Nishimura, Tsutomu Igaki, Shigeru Tsuzuki, Ken Matsunami, Toshio Ishizaki
  • Publication number: 20020140526
    Abstract: An inter-digital transducer has
    Type: Application
    Filed: January 22, 2002
    Publication date: October 3, 2002
    Inventors: Hiroyuki Nakamura, Toru Yamada, Kazunori Nishimura, Toshio Ishizaki, Narihiro Mita
  • Patent number: 6456172
    Abstract: A multilayered ceramic RF device having at least one radio frequency filter includes a low temperature-cofired multilayered ceramic body having a plurality of ceramic layers laminated one upon another and fired together. The low temperature-cofired multilayered ceramic body also has a first electrode pattern formed therein and a second electrode pattern formed thereon. The first and second electrode patterns are electrically connected to one another through a via hole. A bare semiconductor chip is mounted on the low temperature-cofired multilayered ceramic body with a face down bonding, and the bare semiconductor chip is coated with a sealing resin. The at least one radio frequency filter is a multilayered filter formed in the low temperature-cofired multilayered ceramic body, and the multilayered filter includes a part of the first and second electrode patterns.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: September 24, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshio Ishizaki, Toru Yamada, Hiroshi Kagata, Makoto Sakakura
  • Patent number: 6445266
    Abstract: A small multilayer filter, in which a phase shifter may be constituted without increasing overall size of the filter. The overall size may be reduced without deteriorating the characteristics. Above the open end of a plurality of strip lines 4A provided on a dielectric layer 4, a coupling sector 3A of input/output pattern is placed to face it with a dielectric layer 3 interposed. An inductance L1, L2 is formed by connecting a side electrode 7A, 7B with a continuity sector 3B of input/output pattern; and said side electrode 7A, 7B with an input electrode 8A, output electrode 8B, respectively, by means of an electrode pattern 5A.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: September 3, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshitaka Nagatomi, Naoki Yuda, Toshio Ishizaki, Shoichi Kitazawa, Toru Yamada
  • Publication number: 20020119764
    Abstract: A multilayer electronic component has a multilayered product laminating a plurality of dielectric sheets as one piece,
    Type: Application
    Filed: January 11, 2002
    Publication date: August 29, 2002
    Inventors: Takehiko Yamakawa, Toshio Ishizaki, Toru Yamada, Shoichi Kitazawa, Tomoyuki Iwasaki
  • Publication number: 20020100970
    Abstract: A high frequency switch, has
    Type: Application
    Filed: December 27, 2001
    Publication date: August 1, 2002
    Inventors: Shoichi Kitazawa, Masaharu Tanaka, Toshio Ishizaki, Toru Yamada
  • Patent number: 6414572
    Abstract: A dielectric resonator of the invention includes a cavity having a first threaded hole; a dielectric block provided in the cavity; a coupling device coupled with an electromagnetic field produced in the cavity; a frequency tuning member having a screw portion which is spirally engaged with the first threaded hole of the cavity, a distance between the dielectric block and the frequency tuning member being changed by rotating the frequency tuning member, for tuning a resonance frequency of the cavity depending on the distance; and fixing means for fixing a relative positional relationship between the frequency tuning member and the cavity, wherein the fixing means prevents the frequency tuning member from rotating due to a frictional force caused between the first threaded hole of the cavity and the screw portion of the frequency tuning member, the fixing means including a lock nut having a second threaded hole which is spirally engaged with the screw portion of the frequency tuning member.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: July 2, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuki Satoh, Masami Hatanaka, Toshio Ishizaki, Yuji Saka, Toshiaki Nakamura
  • Publication number: 20020063613
    Abstract: A small multilayer filter, in which a phase shifter may be constituted without increasing overall size of the filter. The overall size may be reduced without deteriorating the characteristics. Above the open end of a plurality of strip lines 4A provided on a dielectric layer 4, a coupling sector 3A of input/output pattern is placed to face it with a dielectric layer 3 interposed. An inductance L1, L2 is formed by connecting a side electrode 7A, 7B with a continuity sector 3B of input/output pattern; and said side electrode 7A, 7B with an input electrode 8A, output electrode 8B, respectively, by means of an electrode pattern 5A.
    Type: Application
    Filed: October 25, 2001
    Publication date: May 30, 2002
    Inventors: Yoshitaka Nagatomi, Naoki Yuda, Toshio Ishizaki, Shoichi Kitazawa, Toru Yamada
  • Patent number: 6359531
    Abstract: A small multilayer filter, in which a phase shifter may be constituted without increasing overall size of the filter. The overall size may be reduced without deteriorating the characteristics. Above the open end of a plurality of strip lines 4A provided on a dielectric layer 4, a coupling sector 3A of input/output pattern is placed to face it with a dielectric layer 3 interposed. An inductance L1, L2 is formed by connecting a side electrode 7A, 7B with a continuity sector 3B of input/output pattern; and said side electrode 7A, 7B with an input electrode 8A, output electrode 8B, respectively, by means of an electrode pattern 5A.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: March 19, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshitaka Nagatomi, Naoki Yuda, Toshio Ishizaki, Shoichi Kitazawa, Toru Yamada
  • Publication number: 20020027482
    Abstract: The present matching circuit chip has an integrated shape comprising a first transmission line, a second transmission line and a third transmission line, wherein one end of the first transmission line, one end of the second transmission line and one end of the third transmission line are connected to one another, a first filter connection terminal is connected to the other end of the first transmission line, an antenna terminal is connected to the other end of the second transmission line, and a second filter connection terminal is connected to the other end of the third transmission line, whereby the second transmission line converts the characteristic impedances of the first and third transmission lines so that the impedance matching between the antenna terminal and the first filter connection terminal can be attained, and so that the impedance matching between the antenna terminal and the second filter connection terminal can be attained.
    Type: Application
    Filed: November 9, 2001
    Publication date: March 7, 2002
    Inventors: Hiroshi Kushitani, Toru Yamada, Naoki Yuda, Toshio Ishizaki, Hideaki Nakakubo, Makoto Fujikawa
  • Patent number: 6351196
    Abstract: Disclosed is a surface acoustic wave filter on a piezoelectric substrate. The filter includes at least two surface acoustic wave resonators that each has a reflector electrode on both sides of an IDT electrode as an inter-digital transducer electrode. At least two of the resonators are disposed on a piezoelectric substrate in positions near each other so that the propagation direction of surface acoustic waves are in parallel to make an acoustic coupling. In an embodiment, the acoustic coupling is a direct coupling. The IDT electrode has a plurality of electrode fingers connected so as not to cancel respective electric charges. The IDT electrode is constituted by at least three divisional IDT electrodes. A pair of the electrode fingers can have a reverse phase relation with respect to each other. Also, in a multi-stage surface acoustic wave filter, the electrode fingers can be included in an upper IDT electrode of a top stage of the filter, and in a lower IDT electrode of a bottom stage of such filter.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: February 26, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Nakamura, Toru Yamada, Kazunori Nishimura, Toshio Ishizaki
  • Patent number: 6348845
    Abstract: A surface acoustic wave resonator is constituted by an IDT electrode and reflector electrodes disposed on both sides thereof, on a piezoelectric substrate. Two of said surface acoustic wave resonators are disposed nearby so that the propagation directions of the respective surface acoustic waves are in parallel to each other to make acoustic couple to constitute a surface acoustic wave filter having plural exciting modes with different propagation frequencies. The bus bar electrodes of each of two IDT electrodes are electrically separated from each other, and the leading out electrodes led out from at least two spots on those bus bar electrodes are electrically connected to each other, by which one side of the balanced input and output terminal. As a result, the electrode resistance of the IDT electrode is alleviated to make the insertion loss less.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: February 19, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Nakamura, Toru Yamada, Kazunori Nishimura, Toshio Ishizaki
  • Patent number: 6346866
    Abstract: By using a method for manufacturing a dielectric laminated. device, an opening is formed on a first dielectric sheet, a strip line and an input and output line including an input and output electrode are formed by burying electrode materials in said opening, the first dielectric sheet is laminated with the second and third dielectric sheets disposed above and below respectively to form a laminate, a first and second shield electrodes and a ground electrode are formed, an end of the strip line is connected to the ground electrode, the first shield electrode and the second shield electrode are mutually connected through the ground electrode, and the input and output electrode is exposed along the line direction of the strip line. By this constitution of the above dielectric laminated device, the mounting reliability of the dielectric laminated device can be further increased.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: February 12, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideaki Nakakubo, Toshio Ishizaki, Toru Yamada, Hiroshi Kagata, Tatsuya Inoue, Shoichi Kitazawa