Patents by Inventor Toshio Mitsuno

Toshio Mitsuno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4146413
    Abstract: A method of producing a semiconductor device, comprising the steps of forming a polycrystalline semiconductor layer on the exposed surface of a single crystalline semiconductor substrate, the substrate containing an impurity of one conductivity type and the polycrystalline layer an impurity of the other conductivity type, and heating the polycrystalline layer for the activation thereof at a temperature substantially preventing the impurity contained therein from being diffused into the substrate. The crystal of the substrate is kept free from lattice defect since the impurity is not diffused thereinto. In addition, this method prevents a short circuit from occurring between semiconductor regions of differing conductivity types which would otherwise be caused by deviation in the location of a mask used in the photoetching step.
    Type: Grant
    Filed: November 2, 1976
    Date of Patent: March 27, 1979
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Toshio Yonezawa, Toshio Mitsuno, Kiyoshi Takaoki, Takashi Ajima