Patents by Inventor Toshio Miyazawa

Toshio Miyazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040217933
    Abstract: A display device includes a dynamic ratioless shift register which is operated in a stable manner and can expand the degree of freedom of design. In the dynamic ratioless shift register which is provided with thin film transistors having semiconductor layers made of p-Si on a substrate surface, a node which becomes the floating state is connected to a fixed potential through a capacitance element.
    Type: Application
    Filed: June 2, 2004
    Publication date: November 4, 2004
    Inventors: Toshio Miyazawa, Iwao Takemoto, Atsushi Hasegawa, Masashiro Maki, Kazutaka Goto
  • Publication number: 20040218817
    Abstract: An image processing apparatus is disclosed including: a header/code-data separating unit that separates a codestream of an image into header portions and code-data portions; a header processing unit that edits the separated header portions for generating a new codestream of a portion of the image; a code-data processing unit that selects code-data corresponding to the portion of the image from the separated code-data portions; and a codestream generation unit that generates the new codestream by combining the edited header portions and the selected code-data. The image processing apparatus can generate a new codestream and decomposite the portion of the image without decoding the codestream of the image.
    Type: Application
    Filed: January 7, 2004
    Publication date: November 4, 2004
    Inventors: Taku Kodama, Yasuyuki Nomizu, Junichi Hara, Hiroyuki Sakuyama, Toshio Miyazawa, Yasuyuki Shinkai, Nekka Matsuura, Takanori Yano, Takayuki Nishimura
  • Publication number: 20040217887
    Abstract: An image processing apparatus includes an image data acquisition unit to acquire first encoded image data of a first data size, an image data creation unit to create a second encoded image data of a second, smaller data size than the first data size from the first encoded image data, a display unit to display an image corresponding to the second encoded image data in a displayunit, an editing unit to accept an edit operation to the image displayed in the display unit and for applying an edit processing corresponding to the edit operation to the first encoded image data, and an edit-result manifesting unit to manifest a result of the edit processing to the second encoded image data.
    Type: Application
    Filed: January 14, 2004
    Publication date: November 4, 2004
    Inventors: Yasuyuki Nomizu, Hiroyuki Sakuyama, Junichi Hara, Nekka Matsuura, Takanori Yano, Taku Kodama, Toshio Miyazawa, Yasuyuki Shinkai, Takayuki Nishimura
  • Publication number: 20040208379
    Abstract: An image processing apparatus is disclosed that includes a size adjusting unit and an encoding unit. If the size of a region is fixed, and as a result, an image to be processed by the image processing apparatus is not divisible into the regions, the size adjusting unit adjusts the size of the image so that the image becomes divisible into the regions. The encoding unit encodes the image by the regions and generates a codestream. Accordingly, even if the region is fixed in size, the image can be encoded.
    Type: Application
    Filed: January 21, 2004
    Publication date: October 21, 2004
    Inventors: Taku Kodama, Yasuyuki Nomizu, Junichi Hara, Toshio Miyazawa, Hiroyuki Sakuyama, Yasuyuki Shinkai, Nekka Matsuura, Takanori Yano, Takayuki Nishimura
  • Publication number: 20040201593
    Abstract: In a method for reversibly transforming a data format a forward transformation and a backward transformation are reciprocally conducted for data between unit systems having different resolution levels, and the forward transformation and the backward transformation, a first unit system having a lower resolution level is used as a common unit system, and a reversible data conversion is conducted by an integer operation for data in the first unit system having the lower resolution level and data in a second unit system having a higher resolution level higher than the first unit system.
    Type: Application
    Filed: January 22, 2004
    Publication date: October 14, 2004
    Inventors: Takayuki Nishimura, Yasuyuki Nomizu, Hiroyuki Sakuyama, Junichi Hara, Nekka Matsuura, Takanori Yano, Taku Kodama, Toshio Miyazawa, Yasuyuki Shinkai
  • Publication number: 20040202371
    Abstract: An image processing apparatus is disclosed, including: a dividing unit, a generating unit, an encoding unit, and a combining unit. The dividing unit divides the image into regions based on a division signal, where the division signal indicates image regions of an image. The generating unit generates components corresponding to the regions divided by the dividing unit. Each component is independently encoded by the encoding unit, and is combined into the codestream by the combining unit.
    Type: Application
    Filed: January 23, 2004
    Publication date: October 14, 2004
    Inventors: Taku Kodama, Junichi Hara, Yasuyuki Nomizu, Toshio Miyazawa, Takanori Yano, Yasuyuki Shinkai, Nekka Matsuura, Hiroyuki Sakuyama, Takayuki Nishimura
  • Patent number: 6801177
    Abstract: A liquid crystal display device includes a liquid crystal panel having a plurality of pixels disposed in a matrix format, a Y-selecting signal generating unit for selecting one or more pixel rows, an X-selecting signal generating unit for selecting one or more pixel columns, and a tone signal generating unit for generating a tone signal for applying the corresponding tone voltage to tone information of said display data onto each of the pixels.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: October 5, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Yasuyuki Kudo, Tsutomu Furuhashi, Yoshiro Mikami, Shinichi Komura, Toshio Miyazawa
  • Patent number: 6801194
    Abstract: A display device includes a dynamic ratioless shift register which is operated in a stable manner and can expand the degree of freedom of design. In the dynamic ratioless shift register which is provided with thin film transistors having semiconductor layers made of p-Si on a substrate surface, a node which becomes the floating state is connected to a fixed potential through a capacitance element.
    Type: Grant
    Filed: October 19, 2001
    Date of Patent: October 5, 2004
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Toshio Miyazawa, Iwao Takemoto, Atsushi Hasegawa, Masashiro Maki, Kazutaka Goto
  • Publication number: 20040190782
    Abstract: An image processing apparatus comprises a compression coding unit that performs compression coding of image data according to JPEG2000 algorithm. A coding style selection unit selectively activates coding functions of the compression coding unit in response to a discriminating signal, so that the active coding functions of the compression coding unit are suited to characteristics of the image data.
    Type: Application
    Filed: January 9, 2004
    Publication date: September 30, 2004
    Inventors: Yasuyuki Nomizu, Hiroyuki Sakuyama, Junichi Hara, Nekka Matsuura, Takanori Yano, Taku Kodama, Toshio Miyazawa, Yasuyuki Shinkai, Takayuki Nishimura
  • Patent number: 6791521
    Abstract: A liquid crystal display device has a circuit for selecting voltage levels based upon display data from an externally-supplied gray-scale voltage varying periodically. The circuit includes a plurality of series combinations of processing circuits. Each of the series combinations is associated with one of video signal lines coupled to pixels, and each of the processing circuits of a respective one of the plural series combinations is associated with a respective one of N display data lines for supplying the display data and with a respective one of plural time control signal lines for supplying time control signals varying in synchronism with the gray-scale voltage. Each of the processing circuits is disposed between two adjacent ones of the N display data lines. The time control signals uniquely determine one level of the gray-scale voltage in combination with the time control signals.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: September 14, 2004
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Hironobu Isami, Iwao Takemoto, Toshio Miyazawa, Katsumi Matsumoto
  • Publication number: 20040164944
    Abstract: The invention provides an active matrix type display device which realizes an image display of multiple gray scale exhibiting high numerical aperture and high definition with a least number of wiring by having an image memory circuit equivalent to a static memory circuit without using two voltages, that is, high and low voltages. Pixels are arranged at portions where a plurality of scanning lines (selection signal lines) and a plurality of signal lines (data lines (video signal lines)) intersect each other, each pixel is comprised of a pixel electrode, a switching element which selects the pixel electrode and a memory circuit which stores data to be written in the pixel electrode, and a power supply line which applies an AC voltage to the memory circuit is provided.
    Type: Application
    Filed: March 2, 2004
    Publication date: August 26, 2004
    Inventors: Toshio Miyazawa, Tomohiko Sato
  • Publication number: 20040156548
    Abstract: A code stream generating part converts image data into two-dimensional wavelet coefficients, quantizes the same and coding the quantization result so as to compress the image data and generate a code stream. An additional information creating part creates additional information concerning the image data, and an additional information embedding part embeds the thus-created additional information into the code stream as a code in an off-rule zone which is not decoded by a JPEG 2000 standard rule.
    Type: Application
    Filed: November 20, 2003
    Publication date: August 12, 2004
    Inventors: Taku Kodama, Junichi Hara, Nekka Matsuura, Takanori Yano, Toshio Miyazawa, Yasuyuki Shinkai, Hiroyuki Sakuyama, Yasuyuki Nomizu, Takayuki Nishimura, Keiichi Suzuki, Takashi Maki, Ikuko Yamashiro
  • Publication number: 20040151386
    Abstract: A image processing apparatus transmits a codestream through a transmission path, the codestream being created from an image by dividing the image into rectangular portions and performing a discrete wavelet transform, a quantization and an entropy encoding for the respective rectangular portions of the image. The image processing apparatus comprises an error resilience inserting unit which inserts error resilience to respective code data of the rectangular portions prior to the entropy coding, and an error resilience setting unit which sets intensities of the error resilience inserted to the respective code data for the error resilience inserting unit, so that the error resilience intensities are different according to base units of the respective code data.
    Type: Application
    Filed: November 20, 2003
    Publication date: August 5, 2004
    Inventors: Taku Kodama, Junichi Hara, Nekka Matsuura, Toshio Miyazawa, Yasuyuki Nomizu, Hiroyuki Sakuyama, Yasuyuki Shinkai, Takanori Yano, Takayuki Nishimura
  • Publication number: 20040151387
    Abstract: An apparatus for coding and decoding includes a decoding unit which decodes compressed and coded data to restore original image data, a storing unit which stores additional information other than the image data in memory, and a coding unit which encodes at least a portion of the additional information stored in said memory as information additional to the image data when performing second-time encoding of the image data decoded by said decoding unit.
    Type: Application
    Filed: November 21, 2003
    Publication date: August 5, 2004
    Inventors: Hiroyuki Sakuyama, Junichi Hara, Akio Matsubara, Nekka Matsuura, Toshio Miyazawa, Yasuyuki Nomizu, Yasuyuki Shinkai, Takanori Yano, Taku Kodama, Takayuki Nishimura
  • Patent number: 6771241
    Abstract: The invention provides an active matrix type display device which realizes an image display of multiple gray scale exhibiting high numerical aperture and high definition with a least number of wiring by having an image memory circuit equivalent to a static memory circuit without using two voltages, that is, high and low voltages. Pixels are arranged at portions where a plurality of scanning lines (selection signal lines) and a plurality of signal lines (data lines (video signal lines)) intersect each other, each pixel is comprised of a pixel electrode, a switching element which selects the pixel electrode and a memory circuit which stores data to be written in the pixel electrode, and a power supply line which applies an AC voltage to the memory circuit is provided.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: August 3, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Miyazawa, Tomohiko Sato
  • Publication number: 20040146160
    Abstract: A digital watermarking technique is disclosed, in which image data are converted to frequency components through discrete wavelet transform and quantized into a set of quantized coefficients, which are then divided into a plurality of blocks. A digital watermark is embedded in the quantized coefficients by performing ON/OFF adjustment of bit information, such that the relation between natural number T and the bit information defined by N (N is an even number) significant bits Qnm (x, y) of the m-th bit plane of the n-th block satisfies the ON state represented by equation (1), or the OFF state represented by equation (2), depending on whether the hash value of the n-th block is odd or even. Then the quantized coefficients are encoded to produce a code stream.
    Type: Application
    Filed: November 20, 2003
    Publication date: July 29, 2004
    Inventors: Yasuyuki Nomizu, Hiroyuki Sakuyama, Junichi Hara, Nekka Matsuura, Takanori Yano, Taku Kodama, Toshio Miyazawa, Yasuyuki Shinkai, Takayuki Nishimura
  • Publication number: 20040141651
    Abstract: An image processing apparatus includes a memory which stores a code stream having a wavelet division level, an interface unit which transmits the code stream to another apparatus, and a processing unit which changes the wavelet division level of the code stream before the transmission of the code stream to such another apparatus by acquiring a target division level that is a wavelet division level of such another apparatus, checking a difference between the target division level and the wavelet division level of the code stream, generating data that compensates for the difference, and embedding the generated data into the code stream.
    Type: Application
    Filed: October 24, 2003
    Publication date: July 22, 2004
    Inventors: Junichi Hara, Toshio Miyazawa, Yasuyuki Nomizu, Hiroyuki Sakuyama, Nekka Matsuura, Takanori Yano, Taku Kodama, Yasuyuki Shinkai, Takayuki Nishimura
  • Publication number: 20040135760
    Abstract: A display device has a driver including a level converter formed of polysilicon MISTFTS. The level converter includes first, second and third N-channel MISTFTs (NMISTFTs) and first, second and third P-channel MISTFTs (PMISTFTS). Gate and first terminals of the first NMISTFT and PMISTFT, and a gate terminal of the third PMISTFT are coupled to an input terminal via a capacitance. Second terminals of the second NMISTFT and PMISTFT, and a gate terminal of third NMISTFT are coupled to the input terminal via a capacitance. A first terminal of the third PMISTFT, and second terminals of the first NMISTFT and PMISTFT are coupled to a high voltage. A second terminal of the third NMISTFT, gate and first terminals of the second NMISTFT and PMISTFT are coupled to a low voltage. A second terminal of the third PMISTFT and a first terminal of the third NMISTFT are connected to an output terminal.
    Type: Application
    Filed: December 9, 2003
    Publication date: July 15, 2004
    Inventors: Toshio Miyazawa, Hideo Satou, Tomohiko Satou, Masahiro Maki
  • Publication number: 20040134978
    Abstract: An image data input/output apparatus is disclosed that includes a scanner, a printer, and a storage unit. In addition, a check sheet forming unit forms a check sheet by compositing thumbnails corresponding to items of image data stored in the storage unit and causes the printer to print the formed check sheet. Further, a selected image recognition unit causes the scanner to scan the printed check sheet and recognize the selected thumbnails, and a selected image output unit retrieves the items of image data corresponding to the selected thumbnails and outputs the retrieved items of image data. A user can print the check sheet indicating the thumbnails, and can select one or more thumbnails by indicating a check mark. The image data input/output apparatus scans the check sheet and recognizes the scanned check marks. Accordingly, the user can easily output the items of image data corresponding to the selected thumbnails.
    Type: Application
    Filed: October 10, 2003
    Publication date: July 15, 2004
    Inventors: Junichi Hara, Toshio Miyazawa, Yasuyuki Nomizu, Hiroyuki Sakuyama, Nekka Matsuura, Takanori Yano, Taku Kodama, Yasuyuki Shinkai, Takayuki Nishimura
  • Publication number: 20040125102
    Abstract: The present invention provides a display device which is capable of fetching input signals of a small amplitude into the inside thereof. A level converting circuit includes a first-conductive-type first transistor having a gate electrode to which input signals are applied through a first capacitive element, a second-conductive-type second transistor having a gate electrode to which input signals are applied through a second capacitive element, a first bias circuit which applies a first bias voltage to the gate electrode of the first transistor and a second bias circuit which applies a second bias voltage to the gate electrode of the second transistor. Here, the first bias voltage is a voltage which turns off the first transistor when a voltage applied to the gate electrode of the first transistor assumes a maximum value and the second bias voltage is a voltage which turns off the second transistor when a voltage applied to the gate electrode of the second transistor assumes a minimum value.
    Type: Application
    Filed: December 3, 2003
    Publication date: July 1, 2004
    Applicant: Hitachi Displays, Ltd.
    Inventors: Hideo Sato, Shigeyuki Nishitani, Toshio Miyazawa