Patents by Inventor Toshio Nishimoto

Toshio Nishimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7290838
    Abstract: A vehicle wheel comprises a rim (172) and a disk section (171) separate from the rim. Since the disk section is separate from the rim, the freedom of designing the disk section is improved. The rim comprises an outer rim (178) and an inner rim (181) separate from the outer rim. The outer and inner rims are attached to the outer periphery of the disk section at the same place by welding.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: November 6, 2007
    Assignees: Honda Giken Kogyo Kabushiki Kaisha, Zeniya Aluminum Engineering, Limited, Daido Kogyo Co., Ltd.
    Inventors: Akio Handa, Atsuko Yamaguchi, Yuji Maki, Takashi Nishizaka, Shoji Suzuki, Kiyoshi Amaki, Toshio Nishimoto
  • Patent number: 7248503
    Abstract: A writing operation selecting circuit is provided for selecting a temporary writing operation having a prescribed writing time for a memory cell transistor element and an additional writing operation for the memory cell transistor element. A writing time control circuit is provided for controlling an additional writing operation time by an output signal of the writing operation selecting circuit.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: July 24, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Misumi, Atsushi Fujiwara, Masanori Matsuura, Toshio Nishimoto
  • Patent number: 6999349
    Abstract: A writing operation selecting circuit is provided for selecting a temporary writing operation having a prescribed writing time for a memory cell transistor element and an additional writing operation for the memory cell transistor element. A writing time control circuit is provided for controlling an additional writing operation time by an output signal of the writing operation selecting circuit.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: February 14, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Misumi, Atsushi Fujiwara, Masanori Matsuura, Toshio Nishimoto
  • Publication number: 20060023514
    Abstract: A writing operation selecting circuit is provided for selecting a temporary writing operation having a prescribed writing time for a memory cell transistor element and an additional writing operation for the memory cell transistor element. A writing time control circuit is provided for controlling an additional writing operation time by an output signal of the writing operation selecting circuit.
    Type: Application
    Filed: October 5, 2005
    Publication date: February 2, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kenji Misumi, Atsushi Fujiwara, Masanori Matsuura, Toshio Nishimoto
  • Publication number: 20050168054
    Abstract: A vehicle wheel comprises a rim (172) and a disk section (171) separate from the rim. Since the disk section is separate from the rim, the freedom of designing the disk section is improved. The rim comprises an outer rim (178) and an inner rim (181) separate from the outer rim. The outer and inner rims are attached to the outer periphery of the disk section at the same place by welding.
    Type: Application
    Filed: March 20, 2003
    Publication date: August 4, 2005
    Inventors: Akio Handa, Atsuko Yamaguchi, Yuji Maki, Takashi Nishizaka, Shoji Suzuki, Kiyoshi Amaki, Toshio Nishimoto
  • Publication number: 20040165445
    Abstract: A writing operation selecting circuit is provided for selecting a temporary writing operation having a prescribed writing time for a memory cell transistor element and an additional writing operation for the memory cell transistor element. A writing time control circuit is provided for controlling an additional writing operation time by an output signal of the writing operation selecting circuit.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 26, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kenji Misumi, Atsushi Fujiwara, Masanori Matsuura, Toshio Nishimoto
  • Patent number: 4845670
    Abstract: In a memory device, a shift-register comprises a plurality of stages for transferring sequentially a pair of signals which have mutually opposite phases. Each stage has a comparator circuit which compares the pair of signals and generates a pair of fixed voltage signals. By this construction, high-speed operation of the memory device, low power consumptions, and high-capacity load driving are achieved.
    Type: Grant
    Filed: February 17, 1987
    Date of Patent: July 4, 1989
    Assignee: Matsushita Electronics Corporation
    Inventors: Toshio Nishimoto, Hideki Kawai, Masaru Fujii, Kiyoto Ohta