Patents by Inventor Toshio Sawano

Toshio Sawano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD OF FORMING MASK
    Publication number: 20170221777
    Abstract: A first mask with a first pattern is formed above a substrate, a first portion is formed in or above the substrate using the first mask, a second mask with a second pattern is formed above the substrate, a first positional deviation between the first portion and the second pattern is measured, a second portion is formed in or above the substrate using the second mask, a third mask with a third pattern is formed above the substrate, and a third portion is formed in or above the substrate using the third mask. In the forming the third mask, the third pattern is formed in a material film for the third mask with alignment in consideration of the first positional deviation.
    Type: Application
    Filed: December 21, 2016
    Publication date: August 3, 2017
    Applicant: MIE FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Toshio Sawano
  • Semiconductor device manufacture method with exposure process using small exposure amount, and reticle set for semiconductor device manufacture
    Patent number: 6773853
    Abstract: First and second areas are defined on the substrate. A partial area of a resist film formed on the surface of the substrate is exposed to light having a first intensity, the partial area corresponding to an area above first area, and the light having the first intensity having transmitted through a pattern of a first reticle to be transferred. The resist film above the second area of the substrate is exposed to light having a second intensity weaker than the first intensity. The resist film above the first and second areas is exposed to light having a third intensity weaker than the first intensity, the light having the third intensity having transmitted through a pattern of a second reticle to be transferred. The exposed resist film is developed.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: August 10, 2004
    Assignee: Fujitsu Limited
    Inventors: Takayoshi Minami, Toshio Sawano
  • Semiconductor device manufacture method with exposure process using small exposure amount, and reticle set for semiconductor device manufacture
    Publication number: 20020182545
    Abstract: First and second areas are defined on the substrate. A partial area of a resist film formed on the surface of the substrate is exposed to light having a first intensity, the partial area corresponding to an area above first area, and the light having the first intensity having transmitted through a pattern of a first reticle to be transferred. The resist film above the second area of the substrate is exposed to light having a second intensity weaker than the first intensity. The resist film above the first and second areas is exposed to light having a third intensity weaker than the first intensity, the light having the third intensity having transmitted through a pattern of a second reticle to be transferred. The exposed resist film is developed.
    Type: Application
    Filed: November 1, 2001
    Publication date: December 5, 2002
    Applicant: Fujitsu Limited
    Inventors: Takayoshi Minami, Toshio Sawano