Patents by Inventor Toshio Sunami

Toshio Sunami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Program, information processing device, and information processing method
    Patent number: 11275876
    Abstract: A program is executed in an information processing device including a processor and a memory. The program allows the processor to execute a step of, on the basis of a simulation result of a model in the case where a series of blocks having an input block, one or more operation blocks, and an output block are allowed to operate at a predetermined clock frequency, deciding a new clock frequency of a target block that is allowed to operate at a clock frequency lower than the predetermined clock frequency, and a step of setting the conversion ratios of conversion blocks so as to execute a simulation of the model in which the target block is allowed to operate at the new clock frequency lower than the predetermined clock frequency and the remaining blocks are allowed to operate at the predetermined clock frequency.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: March 15, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tetsuji Tsuda, Teruki Fukuyama, Toshio Sunami
  • PROGRAM, INFORMATION PROCESSING DEVICE, AND INFORMATION PROCESSING METHOD
    Publication number: 20190354646
    Abstract: A program is executed in an information processing device including a processor and a memory. The program allows the processor to execute a step of, on the basis of a simulation result of a model in the case where a series of blocks having an input block, one or more operation blocks, and an output block are allowed to operate at a predetermined clock frequency, deciding a new clock frequency of a target block that is allowed to operate at a clock frequency lower than the predetermined clock frequency, and a step of setting the conversion ratios of conversion blocks so as to execute a simulation of the model in which the target block is allowed to operate at the new clock frequency lower than the predetermined clock frequency and the remaining blocks are allowed to operate at the predetermined clock frequency.
    Type: Application
    Filed: May 1, 2019
    Publication date: November 21, 2019
    Inventors: Tetsuji TSUDA, Teruki FUKUYAMA, Toshio SUNAMI
  • Microprocessor having ROM areas emulated by RAM areas
    Patent number: 6304950
    Abstract: A microcomputer includes a read only memory (ROM) with ROM areas in a built-in ROM for emulation by a random access memory (RAM) for fine tuning a program to be written into the ROM. The microcomputer further includes RAM areas in a built-in RAM and an assigning unit for assigning at least one RAM area to each of the ROM areas. In the emulation mode, each of the ROM areas can be replaced with a corresponding RAM area.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: October 16, 2001
    Assignees: Mitsubishi Electric Semiconductor System Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hideo Inoue, Tetsu Tashiro, Toshio Sunami