Patents by Inventor Toshiro Nakanishi
Toshiro Nakanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080131299Abstract: An objective is to provide a reciprocating pump kept from lowering its performances, while restraining the cost from increasing. Collars 14, 20, 21 made of a material more excellent in resistance to corrosion than a manifold 3 are interposed between the manifold 3 and sealing members 10, 22, 23 for liquid-tightly sealing the manifold 3, so as to prevent the parts in contact with the sealing members 10, 22, 23 from being corroded by a liquid for use, and fully exhibit sealing functions, thereby preventing leakage from occurring in a pump chamber 4 and the pressure oscillation from being increased by the leakage, while the collars 14, 20, 21 made of the material excellent in resistance to leakage are used only in the parts in contact with the sealing members 10, 22, 23.Type: ApplicationFiled: March 26, 2007Publication date: June 5, 2008Applicant: Maruyama Mfg. Co., Inc.Inventor: Toshiro Nakanishi
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Patent number: 6992010Abstract: A method of forming a gate structure. A gate oxide layer, a polysilicon layer, a metallic layer and an insulation layer are sequentially formed over a substrate. Using a definite height level to be an etching end point, the insulation layer, the metallic layer and the polysilicon layer are patterned to form a stack structure. A barrier layer is formed over the stack structure. An etching operation is conducted to form a first spacer covering a portion of each sidewall of the stack structure. The etching operation is continued to remove the polysilicon layer outside the first spacer until the gate oxide layer is exposed. A portion of the exposed polysilicon layer on the sidewalls of the stack structure is removed so that a recess structure is formed. A re-oxidation process is conducted to form a re-oxidation layer within the recess structure. A second spacer is formed over the first spacer and the re-oxidation layer.Type: GrantFiled: February 26, 2003Date of Patent: January 31, 2006Assignee: Winbond Electronics Corp.Inventors: Pao-Haw Chou, Fumihiko Inoue, Toshiro Nakanishi, Yoshio Ozawa
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Patent number: 6984267Abstract: A manufacture method for a semiconductor device includes the steps of: (a) transporting a silicon wafer into a reaction chamber having first and second gas introducing inlet ports; (b) introducing an oxidizing atmosphere via the first gas introducing inlet port and raising the temperature of the silicon wafer to an oxidation temperature; (c) introducing a wet oxidizing atmosphere to form a thermal oxide film on the surface of the silicon wafer; (d) purging gas in the reaction chamber by using inert gas to lower a residual water concentration to about 1000 ppm or lower; and (e) introducing an NO or N2O containing atmosphere into the reaction chamber via the second gas introducing inlet port while the silicon wafer is maintained above 700° C. and above the oxidation temperature, to introduce nitrogen into the thermal oxide film and form an oxynitride film. A thin oxynitride film can be manufactured with good mass productivity.Type: GrantFiled: September 6, 2002Date of Patent: January 10, 2006Assignee: Fujitsu LimitedInventors: Kiyoshi Irino, Ken-ichi Hikazutani, Tatsuya Kawamura, Taro Sugizaki, Satoshi Ohkubo, Toshiro Nakanishi, Kanetake Takasaki
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Publication number: 20030228766Abstract: A method of forming a gate structure. A gate oxide layer, a polysilicon layer, a metallic layer and an insulation layer are sequentially formed over a substrate. Using a definite height level to be an etching end point, the insulation layer, the metallic layer and the polysilicon layer are patterned to form a stack structure. A barrier layer is formed over the stack structure. An etching operation is conducted to form a first spacer covering a portion of each sidewall of the stack structure. The etching operation is continued to remove the polysilicon layer outside the first spacer until the gate oxide layer is exposed. A portion of the exposed polysilicon layer on the sidewalls of the stack structure is removed so that a recess structure is formed. A re-oxidation process is conducted to form a re-oxidation layer within the recess structure. A second spacer is formed over the first spacer and the re-oxidation layer.Type: ApplicationFiled: February 26, 2003Publication date: December 11, 2003Inventors: Pao-Haw Chou, Fumihiko Inoue, Toshiro Nakanishi, Yoshio Ozawa
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Publication number: 20030222303Abstract: A non-volatile semiconductor memory device comprise a source region 44 and a drain region 46 formed in a semiconductor substrate 30; a gate electrode 36 formed on the semiconductor substrate between the source region and the drain region with a first insulation film 32 formed between the gate electrode and the semiconductor substrate; and a charge accumulation region 42a, 42b of a dielectric material, which is formed on at least either of the side wall of the gate electrode on the side of the source region and the side wall of the gate electrode on the side of the drain region. Accordingly, charges accumulated on the side of the source region 44 and the charges accumulated on the side of the drain region 46 can be easily spatially isolated from each other.Type: ApplicationFiled: June 2, 2003Publication date: December 4, 2003Applicant: FUJITSU LIMITEDInventors: Masatoshi Fukuda, Taro Sugizaki, Toshiro Nakanishi, Yasuo Nara
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Patent number: 6541393Abstract: A semiconductor device is fabricated by a method comprising the steps of: selectively introducing a halogen element or argon into a device region 14 of a silicon substrate 10; and wet oxidizing the silicon substrate 10 in an ambient atmosphere which an H2O partial pressure is less than 1 atm to thereby form a silicon oxide film 22 in the device region 14 of the silicon substrate 10, and a silicon oxide film 24 thinner than the silicon oxide film 22 in a device region 16 of the silicon substrate 10. Whereby the silicon oxide film in a device region 14 with the halogen element or argon introduced can be selectively formed thick. The silicon oxide films are formed by the wet oxidation, whereby the gate insulation films can be more reliable than those formed by the dry oxidation.Type: GrantFiled: February 9, 2001Date of Patent: April 1, 2003Assignee: Fujitsu LimitedInventors: Taro Sugizaki, Toshiro Nakanishi, Kyoichi Suguro, Atsushi Murakoshi
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Publication number: 20030022523Abstract: A manufacture method for a semiconductor device includes the steps of: (a) transporting a silicon wafer into a reaction chamber having first and second gas introducing inlet ports; (b) introducing an oxidizing atmosphere via the first gas introducing inlet port and raising the temperature of the silicon wafer to an oxidation temperature; (c) introducing a wet oxidizing atmosphere to form a thermal oxide film on the surface of the silicon wafer; (d) purging gas in the reaction chamber by using inert gas to lower a residual water concentration to about 1000 ppm or lower; and (e) introducing an NO or N2O containing atmosphere into the reaction chamber via the second gas introducing inlet port while the silicon wafer is maintained above 700° C. and above the oxidation temperature, to introduce nitrogen into the thermal oxide film and form an oxynitride film. A thin oxynitride film can be manufactured with good mass productivity.Type: ApplicationFiled: September 6, 2002Publication date: January 30, 2003Applicant: FUJITSU LIMITEDInventors: Kiyoshi Irino, Ken-ichi Hikazutani, Tatsuya Kawamura, Taro Sugizaki, Satoshi Ohkubo, Toshiro Nakanishi, Kanetake Takasaki
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Patent number: 6468926Abstract: A manufacture method for a semiconductor device includes the steps of: (a) transporting a silicon wafer into a reaction chamber having first and second gas introducing inlet ports; (b) introducing an oxidizing atmosphere via the first gas introducing inlet port and raising the temperature of the silicon wafer to an oxidation temperature; (c) introducing a wet oxidizing atmosphere to form a thermal oxide film on the surface of the silicon wafer; (d) purging gas in the reaction chamber by using inert gas to lower a residual water concentration to about 1000 ppm or lower; and (e) introducing an NO or N2O containing atmosphere into the reaction chamber via the second gas introducing inlet port while the silicon wafer is maintained above 700° C. and above the oxidation temperature, to introduce nitrogen into the thermal oxide film and form an oxynitride film. A thin oxynitride film can be manufactured with good mass productivity.Type: GrantFiled: June 29, 1999Date of Patent: October 22, 2002Assignee: Fujitsu LimitedInventors: Kiyoshi Irino, Ken-ichi Hikazutani, Tatsuya Kawamura, Taro Sugizaki, Satoshi Ohkubo, Toshiro Nakanishi, Kanetake Takasaki
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Publication number: 20010018274Abstract: A semiconductor device is fabricated by a method comprising the steps of: selectively introducing a halogen element or argon into a device region 14 of a silicon substrate 10; and wet oxidizing the silicon substrate 10 in an ambient atmosphere which an H2O partial pressure is less than 1 atm to thereby form a silicon oxide film 22 in the device region 14 of the silicon substrate 10, and a silicon oxide film 24 thinner than the silicon oxide film 22 in a device region 16 of the silicon substrate 10. Whereby the silicon oxide film in a device region 14 with the halogen element or argon introduced can be selectively formed thick. The silicon oxide films are formed by the wet oxidation, whereby the gate insulation films can be more reliable than those formed by the dry oxidation.Type: ApplicationFiled: February 9, 2001Publication date: August 30, 2001Applicant: Fujitsu Limited and Kabushiki Kaisha ToshibaInventors: Taro Sugizaki, Toshiro Nakanishi, Kyoichi Suguro, Atsushi Murakoshi
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Patent number: 5693578Abstract: A method of forming a silicon oxide film by setting a silicon wafer in a chamber capable of introducing oxidizing gas and being evacuated and by heating the silicon wafer in an oxidizing atmosphere. The method includes the steps of: transporting the silicon wafer into the chamber without contacting the silicon wafer with air; introducing an ozone containing gas into the chamber and setting the interior of the chamber to a predetermined pressure; and heating the silicon wafer to a predetermined temperature and oxidizing the surface of the silicon wafer. The predetermined pressure is preferably between 200 Torr and 0.1 Torr. Ozone may be generated from oxygen by applying ultraviolet rays to the upper space of a silicon wafer. The temperature of ozone to be introduced is preferably low. It is preferable to incorporate infrared heating in order not to excessively heat ozone and to heat a silicon wafer to a high temperature.Type: GrantFiled: February 26, 1996Date of Patent: December 2, 1997Assignee: Fujitsu, Ltd.Inventors: Toshiro Nakanishi, Yasuhisa Sato, Masaki Okuno
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Patent number: 5504022Abstract: A method of forming a non-volatile semiconductor memory device includes the steps of forming a generally periodical undulation on a surface of a silicon substrate with a pitch of 1-20 nm, by cleaning the surface of the substrate by a cleaning solution to form a native silicon oxide film that covers the surface of the silicon substrate with a thickness that changes generally periodically, followed by a selective etching process applied to the native silicon oxide film thus formed to expose the surface of the silicon substrate, and forming a tunneling oxide film on the undulated surface of the substrate by applying a thermal oxidation such that the tunneling oxide film has a thickness that changes generally periodically with a pitch of 1-20 nm.Type: GrantFiled: December 23, 1993Date of Patent: April 2, 1996Assignee: Fujitsu LimitedInventors: Toshiro Nakanishi, Yasuhisa Sato
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Patent number: 5217908Abstract: A method for fabricating a semiconductor device comprises the steps of providing an oxide film containing silicon and oxygen on a substrate, introducing species containing oxygen into the oxide film by an ion implantation process, and providing an electrode on the oxide film.Type: GrantFiled: June 20, 1991Date of Patent: June 8, 1993Assignee: Fujitsu LimitedInventor: Toshiro Nakanishi