Abstract: A high frequency circuit board comprising: a choke coil circuit element of a high frequency switching circuit; a dielectric laminated structure body comprising a plurality of dielectric layers which comprise a first dielectric layer and a second dielectric layer; a land formed on the first dielectric layer; and a circuit pattern formed on the second dielectric layer, wherein the choke coil circuit element is mounted on the land as a chip inductor, the first dielectric layer is located at the end of the body, the second dielectric layer is located nearest to the first board in at least one of the dielectric layers on which a circuit pattern is formed, and the land is positioned out of a region formed by projecting the circuit pattern formed on the second dielectric layer in the direction of laminating of the plurality of dielectric layers.

Abstract: A high frequency circuit board comprising: a choke coil circuit element of a high frequency switching circuit; a dielectric laminated structure body comprising a plurality of dielectric layers which comprise a first dielectric layer and a second dielectric layer; a land formed on the first dielectric layer; and a circuit pattern formed on the second dielectric layer, wherein the choke coil circuit element is mounted on the land as a chip inductor, the first dielectric layer is located at the end of the body, the second dielectric layer is located nearest to the first board in at least one of the dielectric layers on which a circuit pattern is formed, and the land is positioned out of a region formed by projecting the circuit pattern formed on the second dielectric layer in the direction of laminating of the plurality of dielectric layers.

Abstract: In a ceramic substrate with a thin-film capacitor, having a ceramic substrate a lower electrode layer formed on the ceramic substrate, a dielectric layer formed on the lower electrode layer and made of an oxide of a material constituting the lower electrode layer, and an upper electrode layer formed on the dielectric layer, a plating layer is provided between the ceramic base and the lower electrode layer to serve as a basis for the lower electrode layer.