Patents by Inventor Toshiteru Nakawaki

Toshiteru Nakawaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SUBSTRATE SET, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING SUBSTRATE SET
    Publication number: 20130186678
    Abstract: Provided is a highly accurately alignable substrate set, the cost of which is kept low. In the substrate set, a light source FPC substrate (11) has a notch (16), and an anode pad (13) and a cathode pad (14) that are disposed so as to sandwich the notch (16) therebetween, and a panel FPC substrate (21) has a plus terminal (23) and a minus terminal (24) that are disposed so as to be in contact with the anode pad (13) and the cathode pad (14), and an opening (26) that is sandwiched between the plus terminal (23) and the minus terminal (24).
    Type: Application
    Filed: January 6, 2011
    Publication date: July 25, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Eiji Koike, Yukihiro Sumida, Toshiteru Nakawaki
  • SHIELD CASE MOUNTING SUBSTRATE
    Publication number: 20110090664
    Abstract: In a shield case mounting substrate, a downwardly extending portion of a shield case is solder-bonded to a first land pattern and a second land pattern which are provided on the surface of a substrate. The width of the first land pattern in the thickness direction of the downwardly extending portion is greater than the width of the second land pattern in the thickness direction of the downwardly extending portion. Consequently, the high bonding strength between the shield case and the substrate can be ensured, and the positioning accuracy of the shield case on the substrate can also be ensured.
    Type: Application
    Filed: April 28, 2009
    Publication date: April 21, 2011
    Inventors: Yukihiro Sumida, Toshiteru Nakawaki
  • Liquid crystal display apparatus and apparatus for manufacturing the same
    Patent number: 5978060
    Abstract: An object of the invention is to solve the problem that a pitch of a connection terminal is limited and a circuit size is enlarged by itself in the case where a Com-PWB and a Seg-PWB provided along a side of the liquid crystal display panel are connected via the flexible flat cable. The Com-PWB is provided approximately in parallel along one side of the liquid crystal display panel on the voltage application terminal side of the scanning electrode while the Seg-PWB is provided approximately in parallel along the other side of the liquid crystal display panel on the voltage application terminal side of the data electrode. The Com-PWB has a length nearly equal to that of the one side of the liquid crystal display panel while the Seg-PWB has a length nearly equal to that of the other side of the liquid crystal display panel. The Com-PWB and the Seg-PWB are electrically connected with an FPC.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: November 2, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshiteru Nakawaki, Shinichi Tani, Masayoshi Takemoto