Abstract: The present invention has a configuration in which it is detected whether an access request from a processor 10 to a memory 17 is a write request or a read request; the operation clock of the processor 10 is stopped for a predetermined number of clock cycles when the access request represents a read request to the memory 17; and the operation clock of the processor 10 is not stopped when the clock control request signal represents a write request to the memory 17.

Abstract: A drain-source interconnection of a MOS transistor is represented by a parallel circuit formed of an electric current source and a resistor. The current of the electric current source, i, is represented by a polynomial of a difference (V.sub.GS -V.sub.T) where V.sub.GS is the gate-source voltage and V.sub.T is the threshold voltage. The operation area of the MOS transistor is divided into a plurality of sub-operation areas according to the gate-source and drain-source voltages. Respective coefficients of the polynomial and respective conductance of the resistor element are stored for the sub-operation areas. A MOS transistor model is prepared so that V.sub.T is represented by a polynomial of V.sub.BS, the substrate-source voltage of the MOS transistor. A circuit equation for a MOS transistor-containing semiconductor circuit is derived from the MOS transistor model. The circuit equation is analyzed.

Abstract: A characteristic of a MOS transistor is represented using an equivalent model. The equivalent model shows a connection configuration made up of an electric current source which supplies an electric current and a resistor element which is connected in parallel with the electric current source. The electric current is given by the equation of i=G.sub.m .multidot.(V.sub.GS -V.sub.T) for V.sub.GS .gtoreq.V.sub.T where G.sub.m is a coefficient, V.sub.GS is a gate-to-source input voltage of said MOS transistor, and V.sub.T is a given threshold voltage. A plurality of operating zones of the MOS transistor are defined according to the drain, source, and gate terminal voltages of the MOS transistor and are assigned respective values of the coefficient G.sub.m and respective values of the resistor element's resistance. By such a representation, the circuit equation of a semiconductor circuit that is analyzed can be represented in the form of a linear time-invariant equation.

Abstract: A mark sensor device which is small and convenient in mounting is disclosed. The mark sensor device contains an image data transmitter made of a plurality of optical fibers in a bundle positioned between the object mark and the image sensor, and uses a one-dimensional image sensor. The ends of the plurality of optical fibers on one end of the image data transmitter are arranged in a square shape. The other ends of the plurality of optical fibers on the other end of the image data transmitter are arranged along a line. The one-dimensional image sensor is aligned correspondingly with the linearly aligned ends of the plurality of optical fibers. Accordingly, the light including the optical image of the object mark irradiates the one end of the image data transmitter, travels through the transmitter and comes out from the other end of the transmitter. Thus, the brightness of the light is detected by the one-dimensional image sensor for accurate positioning of the object mark.