Patents by Inventor Toshitugu Ueda

Toshitugu Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11437350
    Abstract: A semiconductor device includes a plurality of memory chips laminated to each other, each of the memory chips include a first transmission/reception coil for communication by means of inductive coupling; first lead-out lines led out from both ends of the first transmission/reception coil; and a first transmission/reception circuit, which is connected to the first lead-out lines, and which inputs/outputs signals to/from the first transmission/reception coil.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: September 6, 2022
    Assignee: ULTRAMEMORY INC.
    Inventors: Naoki Ogawa, Toshitugu Ueda, Kazuo Yamaguchi
  • Publication number: 20210151415
    Abstract: A semiconductor device includes a plurality of memory chips laminated to each other, each of the memory chips include a first transmission/reception coil for communication by means of inductive coupling; first lead-out lines led out from both ends of the first transmission/reception coil; and a first transmission/reception circuit, which is connected to the first lead-out lines, and which inputs/outputs signals to/from the first transmission/reception coil.
    Type: Application
    Filed: January 26, 2021
    Publication date: May 20, 2021
    Inventors: Naoki OGAWA, Toshitugu UEDA, Kazuo YAMAGUCHI
  • Patent number: 10937765
    Abstract: A semiconductor device includes a plurality of memory chips laminated to each other, each of the memory chips include a first transmission/reception coil for communication by means of inductive coupling; first lead-out lines led out from both ends of the first transmission/reception coil; and a first transmission/reception circuit, which is connected to the first lead-out lines, and which inputs/outputs signals to/from the first transmission/reception coil.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: March 2, 2021
    Assignee: ULTRAMEMORY INC.
    Inventors: Naoki Ogawa, Toshitugu Ueda, Kazuo Yamaguchi
  • Publication number: 20200043899
    Abstract: A semiconductor device includes a plurality of memory chips laminated to each other, each of the memory chips include a first transmission/reception coil for communication by means of inductive coupling; first lead-out lines led out from both ends of the first transmission/reception coil; and a first transmission/reception circuit, which is connected to the first lead-out lines, and which inputs/outputs signals to/from the first transmission/reception coil.
    Type: Application
    Filed: October 8, 2019
    Publication date: February 6, 2020
    Inventors: Naoki Ogawa, Toshitugu Ueda, Kazuo Yamaguchi
  • Patent number: 10483242
    Abstract: A semiconductor device of the present invention is provided with a plurality of memory chips laminated to each other, each of said memory chips having: a first transmission/reception coil for communication by means of inductive coupling; first lead-out lines led out from both ends of the first transmission/reception coil; and a first transmission/reception circuit, which is connected to the first lead-out lines, and which inputs/outputs signals to/from the first transmission/reception coil.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: November 19, 2019
    Assignee: ULTRAMEMORY INC.
    Inventors: Naoki Ogawa, Toshitugu Ueda, Kazuo Yamaguchi
  • Publication number: 20190035768
    Abstract: A semiconductor device of the present invention is provided with a plurality of memory chips laminated to each other, each of said memory chips having: a first transmission/reception coil for communication by means of inductive coupling; first lead-out lines led out from both ends of the first transmission/reception coil; and a first transmission/reception circuit, which is connected to the first lead-out lines, and which inputs/outputs signals to/from the first transmission/reception coil.
    Type: Application
    Filed: February 10, 2016
    Publication date: January 31, 2019
    Inventors: Naoki OGAWA, Toshitugu UEDA, Kazuo YAMAGUCHI
  • Patent number: 4990909
    Abstract: A multi-turn absolute encoder comprising a shaft angle encoder for measuring the turning angle of a rotating shaft, and a turn detector for detecting the number of turns of the rotating shaft, wherein the turn detector uses a magnetic bubble element for sequentially transferring magnetic bubbles in a pattern in accordance with a magnetic field generated by a permanent magnet turned by the shaft, and a detector to detect the number of turns of the shaft from the positions of the magnetic bubbles which are transferred in the pattern.
    Type: Grant
    Filed: September 21, 1989
    Date of Patent: February 5, 1991
    Assignee: Yokogawa Electric Corporation
    Inventors: Toshitugu Ueda, Fusao Kohsaka, Toshi Iino, Kunio Kazami, Hiroshi Nakayama, Yoshiaki Kudou, Yasuhiro Sakamaki