Patents by Inventor Toshiya Fujiyama

Toshiya Fujiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12265013
    Abstract: A detection mechanism includes a light source disposed on a substrate, a condensing lens disposed between the substrate and light emitted from the light source, and a photodetector disposed on the substrate and under the condensing lens.
    Type: Grant
    Filed: August 11, 2023
    Date of Patent: April 1, 2025
    Assignee: Sharp Semiconductor Innovation Corporation
    Inventors: Daiki Naruse, Toshiya Fujiyama, Hirokazu Sasabe, Yoshifumi Masuda, Mitsutoshi Okami, Noboru Takeuchi
  • Publication number: 20240062982
    Abstract: An ion generating apparatus, comprising: an ion generating circuit including a positive ion generating electrode pair and a negative ion generating electrode pair; and a controller configured to control the ion generating circuit, wherein the controller causes the ion generating circuit to apply a positive voltage to the positive ion generating electrode pair and a negative voltage to the negative ion generating electrode pair in different periods, the positive voltage having a waveform that is a first ringing voltage waveform a negative peak of which is removed, and the negative voltage having a waveform that is a second ringing voltage waveform a positive peak of which is removed.
    Type: Application
    Filed: August 9, 2023
    Publication date: February 22, 2024
    Inventor: Toshiya FUJIYAMA
  • Publication number: 20230384207
    Abstract: A detection mechanism includes a light source disposed on a substrate, a condensing lens disposed between the substrate and light emitted from the light source, and a photodetector disposed on the substrate and under the condensing lens.
    Type: Application
    Filed: August 11, 2023
    Publication date: November 30, 2023
    Inventors: Daiki NARUSE, Toshiya FUJIYAMA, Hirokazu SASABE, Yoshifumi MASUDA, Mitsutoshi OKAMI, Noboru TAKEUCHI
  • Patent number: 11774345
    Abstract: A detection mechanism includes a light source disposed on a substrate, a condensing lens disposed between the substrate and light emitted from the light source, and a photodetector disposed on the substrate and under the condensing lens.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: October 3, 2023
    Assignee: Sharp Semiconductor Innovation Corporation
    Inventors: Daiki Naruse, Toshiya Fujiyama, Hirokazu Sasabe, Yoshifumi Masuda, Mitsutoshi Okami, Noboru Takeuchi
  • Publication number: 20230288360
    Abstract: A gas sensor includes: a sensor surface on which a metal-oxide film grows; a detection unit configured to detect a change in a resistance value of the metal-oxide film; and a computation unit configured to compute a quantity of reducing gas in measurement-target air based on a result of the detection by the detection unit, wherein the gas sensor operates in a first mode in which the gas sensor stands by with standby air, which differs from the measurement-target air, being in contact with the sensor surface immediately after the gas sensor is activated and in a second mode that follows the first mode and in which, the detection unit detects a change in the resistance value, and the computation unit computes the quantity of the reducing gas based on the result of the detection, with the measurement-target air being in contact with the sensor surface.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 14, 2023
    Inventors: Toshiya FUJIYAMA, Noboru TAKEUCHI, Daiki NARUSE
  • Publication number: 20230194490
    Abstract: A detection device according to an aspect of the invention, includes: a housing including an air intake port and an air discharge port; a platelike member having a first air ventilation port and a second air ventilation port, the platelike member being provided inside the housing; a first sensor provided on an air intake port side of the first air ventilation port on a front face of the platelike member; and a second sensor provided between the first air ventilation port and the second air ventilation port on a rear face of the platelike member.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 22, 2023
    Inventors: Noboru TAKEUCHI, Daiki NARUSE, Mitsutoshi OKAMI, Hirokazu SASABE, Toshiya FUJIYAMA, Yoshifumi MASUDA
  • Publication number: 20220099554
    Abstract: A detection mechanism includes a light source disposed on a substrate, a condensing lens disposed between the substrate and light emitted from the light source, and a photodetector disposed on the substrate and under the condensing lens.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 31, 2022
    Inventors: Daiki NARUSE, Toshiya FUJIYAMA, Hirokazu SASABE, Yoshifumi MASUDA, Mitsutoshi OKAMI, Noboru TAKEUCHI
  • Patent number: 9300153
    Abstract: The amount of power generated by a solar cell is used for charging more efficiently. An activation determination means 4 activates a charging control circuit 3 by allowing a maximum output current from a solar cell 1 to a GND potential to flow and detecting that the output current is equal to or greater than current consumption of the charging control circuit 3 instead of monitoring an unstable output voltage from the solar cell 1. Thus, the charging control circuit 3 can be activated more precisely in comparison to a case where an output voltage is monitored under the condition that the charging control circuit 3 is operated only by the amount of power generated by the solar cell. Thereby, a power instrument 2 is charged more efficiently with the amount of power generated by the solar cell.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: March 29, 2016
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Toshiya Fujiyama
  • Patent number: 9263957
    Abstract: A flyback-type switching power supply circuit provided with a transformer including a primary coil and a secondary coil, and a switching element connected to the primary coil, comprising: a multiplying circuit for multiplying a first value obtained by multiplying the on-duty ratio of a secondary current flowing to the secondary coil by a predetermined first constant, and a second value obtained by multiplying the peak value of a primary current flowing to the primary coil by a predetermined second constant; and a switching control circuit for controlling switching of the switching element so that the result of multiplication by the multiplying circuit and a third value obtained by multiplying a reference voltage by a predetermined third constant match; and the flyback-type switching power supply circuit is configured so that at least one of the first constant, the second constant, and the third constant is variable by an external signal.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: February 16, 2016
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hideyuki Imanaka, Toshiya Fujiyama, Ryohta Takahashi, Yasuo Kudara
  • Publication number: 20150048755
    Abstract: A flyback-type switching power supply circuit provided with a transformer including a primary coil and a secondary coil, and a switching element connected to the primary coil, comprising: a multiplying circuit for multiplying a first value obtained by multiplying the on-duty ratio of a secondary current flowing to the secondary coil by a predetermined first constant, and a second value obtained by multiplying the peak value of a primary current flowing to the primary coil by a predetermined second constant; and a switching control circuit for controlling switching of the switching element so that the result of multiplication by the multiplying circuit and a third value obtained by multiplying a reference voltage by a predetermined third constant match; and the flyback-type switching power supply circuit is configured so that at least one of the first constant, the second constant, and the third constant is variable by an external signal.
    Type: Application
    Filed: March 22, 2013
    Publication date: February 19, 2015
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hideyuki Imanaka, Toshiya Fujiyama, Ryohta Takahashi, Yasuo Kudara
  • Publication number: 20140176043
    Abstract: The amount of power generated by a solar cell is used for charging more efficiently. An activation determination means 4 activates a charging control circuit 3 by allowing a maximum output current from a solar cell 1 to a GND potential to flow and detecting that the output current is equal to or greater than current consumption of the charging control circuit 3 instead of monitoring an unstable output voltage from the solar cell 1. Thus, the charging control circuit 3 can be activated more precisely in comparison to a case where an output voltage is monitored under the condition that the charging control circuit 3 is operated only by the amount of power generated by the solar cell. Thereby, a power instrument 2 is charged more efficiently with the amount of power generated by the solar cell.
    Type: Application
    Filed: April 26, 2012
    Publication date: June 26, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshiya Fujiyama
  • Patent number: 7586299
    Abstract: There is provided a power-supply platform IC for realizing a parameter-deciding power-supply circuit, which, in order to decide a parameter of a power-supply circuit that supplies power to an electronic circuit IC (load), is connected to the electronic circuit IC (load) in place of the power-supply circuit. The power-supply platform IC includes: one or more transistor arrays that include a plurality of transistors operable as switching transistors; and a selecting circuit for selecting a transistor to be operated as a switching transistor from among the plurality of transistors, so as to control a size of the transistor that operates as a switching transistor, wherein the selecting circuit varies the size of the transistor as a parameter of the power-supply circuit, according to an external command.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: September 8, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshiya Fujiyama, Hiroki Doi, Shigeyoshi Kitamura
  • Patent number: 7436378
    Abstract: An LED terminal monitoring circuit detects an LED at the lowest potential among a plurality of parallel-connected LEDs. An analog signal selecting circuit gives a signal indicating the voltage of the detected LED to a boosting circuit. The boosting circuit performs a boosting operation on the basis of the condition of the detected LED at the lowest voltage and, consequently, a voltage sufficient for driving the LEDs in a current-control mode can be applied to all the LEDs. Signal lines not connected to LEDs are excluded from objects of a LED-switching control operation.
    Type: Grant
    Filed: October 2, 2004
    Date of Patent: October 14, 2008
    Assignees: AL-AID Corporation, Sharp Kabushiki Kaisha
    Inventors: Satoru Ito, Seijun Nishimura, Toshiya Fujiyama
  • Publication number: 20070035280
    Abstract: There is provided a power-supply platform IC for realizing a parameter-deciding power-supply circuit, which, in order to decide a parameter of a power-supply circuit that supplies power to an electronic circuit IC (load), is connected to the electronic circuit IC (load) in place of the power-supply circuit. The power-supply platform IC includes: one or more transistor arrays that include a plurality of transistors operable as switching transistors; and a selecting circuit for selecting a transistor to be operated as a switching transistor from among the plurality of transistors, so as to control a size of the transistor that operates as a switching transistor, wherein the selecting circuit varies the size of the transistor as a parameter of the power-supply circuit, according to an external command.
    Type: Application
    Filed: August 11, 2006
    Publication date: February 15, 2007
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Toshiya Fujiyama, Hiroki Doi, Shigeyoshi Kitamura
  • Publication number: 20050104542
    Abstract: An LED terminal monitoring circuit detects an LED at the lowest potential among a plurality of parallel-connected LEDs. An analog signal selecting circuit gives a signal indicating the voltage of the detected LED to a boosting circuit. The boosting circuit performs a boosting operation on the basis of the condition of the detected LED at the lowest voltage and, consequently, a voltage sufficient for driving the LEDs in a current-control mode can be applied to all the LEDs. Signal lines not connected to LEDs are excluded from objects of a LED-switching control operation.
    Type: Application
    Filed: October 2, 2004
    Publication date: May 19, 2005
    Applicants: AL-AID Corporation, Sharp Kabushiki Kaisha
    Inventors: Satoru Ito, Seijun Nishimura, Toshiya Fujiyama
  • Patent number: 6803807
    Abstract: In a negative voltage output charge pump circuit, first a capacitor C1 is charged with a positive voltage Vin relative to a reference voltage, and then the high-potential terminal A of the capacitor C1 is made to conduct to the reference voltage and simultaneously the low-potential terminal B of the capacitor C1 is made to conduct to an output terminal OUT so that the voltage with which the capacitor C1 is charged is output as a negative voltage −Vin. Here, at least one of the switching device DP1 that is kept on while the capacitor C1 is being charged so as to apply the reference voltage to the point B and the switching device DP2 that is kept on while the negative voltage is being output so as to make the point B conduct to the output terminal OUT is a depletion-type transistor. This configuration makes it possible to realize a negative voltage output charge pump circuit that is free from malfunctioning caused by a parasitic device, that operates with low loss, and that can be produced at low costs.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: October 12, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshiya Fujiyama, Masanori Inamori, Hiroki Doi
  • Publication number: 20030151448
    Abstract: In a negative voltage output charge pump circuit, first a capacitor C1 is charged with a positive voltage Vin relative to a reference voltage, and then the high-potential terminal A of the capacitor C1 is made to conduct to the reference voltage and simultaneously the low-potential terminal B of the capacitor C1 is made to conduct to an output terminal OUT so that the voltage with which the capacitor C1 is charged is output as a negative voltage −Vin. Here, at least one of the switching device DP1 that is kept on while the capacitor C1 is being charged so as to apply the reference voltage to the point B and the switching device DP2 that is kept on while the negative voltage is being output so as to make the point B conduct to the output terminal OUT is a depletion-type transistor. This configuration makes it possible to realize a negative voltage output charge pump circuit that is free from malfunctioning caused by a parasitic device, that operates with low loss, and that can be produced at low costs.
    Type: Application
    Filed: February 5, 2003
    Publication date: August 14, 2003
    Inventors: Toshiya Fujiyama, Masanori Inamori, Hiroki Doi
  • Patent number: 6473316
    Abstract: A phase control circuit which can stabilize voltage control when used in a switching regulator, and a switching regulator using such a phase control circuit are provided. A switching circuit for generating a first and a second output signals having opposite polarities based on a clock signal, is provided. A PWM latch circuit, reset by a reset signal, for generating a third and a fourth output signals which have phases controlled with respect to the first and the second output signals respectively by a set signal produced based on a control signal and come to have opposite polarities, is provided. A delay circuit for delaying the rising of each of the first through the fourth output signals before outputting each of the first through the fourth output signals is provided for each output signal.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: October 29, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshiya Fujiyama, Masanori Inamori
  • Patent number: 6400201
    Abstract: A delay circuit in accordance with the present invention includes: a first I2L inverter and a second I2L inverter connected in cascade with each other; and a capacitor interposed between a ground and a connecting point of the first and second inverters, wherein: the delay circuit further includes a current adjusting circuit having at least one third I2L inverter with a plurality of output terminals at least one of which is connected to an input terminal of the third I2L inverter; and the current adjusting circuit is connected to adjust a charge current of the capacitor. The configuration provides a delay circuit of simple circuit structure that accounts for a small area in an integrated circuit and that is capable of introducing any given delay and also provides a ring oscillator incorporating the delay circuit.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: June 4, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masanori Inamori, Syouji Sakurai, Toshiya Fujiyama, Hiroki Doi
  • Publication number: 20020039036
    Abstract: A delay circuit in accordance with the present invention includes: a first I2L inverter and a second I2L inverter connected in cascade with each other; and a capacitor interposed between a ground and a connecting point of the first and second inverters, wherein: the delay circuit further includes a current adjusting circuit having at least one third I2L inverter with a plurality of output terminals at least one of which is connected to an input terminal of the third I2L inverter; and the current adjusting circuit is connected to adjust a charge current of the capacitor. The configuration provides a delay circuit of simple circuit structure that accounts for a small area in an integrated circuit and that is capable of introducing any given delay and also provides a ring oscillator incorporating the delay circuit.
    Type: Application
    Filed: September 5, 2001
    Publication date: April 4, 2002
    Inventors: Masanori Inamori, Syouji Sakurai, Toshiya Fujiyama, Hiroki Doi