Abstract: A semiconductor memory device comprises: first conductive layers arranged in a first direction; a first semiconductor layer facing the first conductive layers; a second semiconductor layer facing the first conductive layers; second conductive layers arranged in the first direction; third conductive layers arranged in the first direction; a third semiconductor layer facing the second conductive layers and connected to the first semiconductor layer; a fourth semiconductor layer facing the third conductive layers and connected to the second semiconductor layer; a fourth conductive layer facing the third semiconductor layer; and a fifth conductive layer connected to the third conductive layers. A distance from a central axis of the third semiconductor layer to a central axis of the fourth semiconductor layer is larger than a distance from a central axis of the first semiconductor layer to a central axis of the second semiconductor layer.

Abstract: A semiconductor memory device comprises: first conductive layers arranged in a first direction; a first semiconductor layer facing the first conductive layers; a second semiconductor layer facing the first conductive layers; second conductive layers arranged in the first direction; third conductive layers arranged in the first direction; a third semiconductor layer facing the second conductive layers and connected to the first semiconductor layer; a fourth semiconductor layer facing the third conductive layers and connected to the second semiconductor layer; a fourth conductive layer facing the third semiconductor layer; and a fifth conductive layer connected to the third conductive layers. A distance from a central axis of the third semiconductor layer to a central axis of the fourth semiconductor layer is larger than a distance from a central axis of the first semiconductor layer to a central axis of the second semiconductor layer.

Abstract: According to one embodiment, a memory device includes first and second electrically conductive portions, a first variable resistance portion, and a first region. A direction from the first electrically conductive portion toward the second electrically conductive portion is aligned with a first direction. The first variable resistance portion is provided between the first and second electrically conductive portions. A second direction from the first variable resistance portion toward the first region crosses the first direction. The first region includes a first layer portion, and a second layer portion provided between the first layer portion and the first variable resistance portion in the second direction. A first distance between the first and second layer portions is longer than first or second lattice length. The first lattice length is a lattice length of the first layer portion. The second lattice length is a lattice length of the second layer portion.

Abstract: According to one embodiment, a memory device includes first and second electrically conductive portions, a first variable resistance portion, and a first region. A direction from the first electrically conductive portion toward the second electrically conductive portion is aligned with a first direction. The first variable resistance portion is provided between the first and second electrically conductive portions. A second direction from the first variable resistance portion toward the first region crosses the first direction. The first region includes a first layer portion, and a second layer portion provided between the first layer portion and the first variable resistance portion in the second direction. A first distance between the first and second layer portions is longer than first or second lattice length. The first lattice length is a lattice length of the first layer portion. The second lattice length is a lattice length of the second layer portion.

Abstract: According to one embodiment, a memory device includes first and second electrically conductive portions, a first variable resistance portion, and a first region. A direction from the first electrically conductive portion toward the second electrically conductive portion is aligned with a first direction. The first variable resistance portion is provided between the first and second electrically conductive portions. A second direction from the first variable resistance portion toward the first region crosses the first direction. The first region includes a first layer portion, and a second layer portion provided between the first layer portion and the first variable resistance portion in the second direction. A first distance between the first and second layer portions is longer than first or second lattice length. The first lattice length is a lattice length of the first layer portion. The second lattice length is a lattice length of the second layer portion.

Abstract: According to one embodiment, a memory device includes first and second electrically conductive portions, a first variable resistance portion, and a first region. A direction from the first electrically conductive portion toward the second electrically conductive portion is aligned with a first direction. The first variable resistance portion is provided between the first and second electrically conductive portions. A second direction from the first variable resistance portion toward the first region crosses the first direction. The first region includes a first layer portion, and a second layer portion provided between the first layer portion and the first variable resistance portion in the second direction. A first distance between the first and second layer portions is longer than first or second lattice length. The first lattice length is a lattice length of the first layer portion. The second lattice length is a lattice length of the second layer portion.

Abstract: The present technology relates to an input device, a transmitting method, a host device, a receiving method, a signal processing system, and a transceiving method, which are capable of easily performing transmission and reception of multiplexed data obtained by multiplexing a plurality of electric signals between a plug device including a plug and a jack device including a jack. An input device detects whether or not the jack device including the jack is an associated device capable of dealing the multiplexed data obtained by multiplexing a plurality of electric signals, and transmits the multiplexed data via the plug when the jack device is the associated device. The host device detects whether or not the plug device including the plug is the associated device, and receives the multiplexed data transmitted from the plug device via the jack when the plug device is the associated device. The present technology can be applied to a music player having a jack and a headset having a plug, for example.

Abstract: The present technology relates to an input device, a transmitting method, a host device, a receiving method, a signal processing system, and a transceiving method, which are capable of easily performing transmission and reception of multiplexed data obtained by multiplexing a plurality of electric signals between a plug device including a plug and a jack device including a jack. An input device detects whether or not the jack device including the jack is an associated device capable of dealing the multiplexed data obtained by multiplexing a plurality of electric signals, and transmits the multiplexed data via the plug when the jack device is the associated device. The host device detects whether or not the plug device including the plug is the associated device, and receives the multiplexed data transmitted from the plug device via the jack when the plug device is the associated device. The present technology can be applied to a music player having a jack and a headset having a plug, for example.

Abstract: A reproduction apparatus for an optical recording medium that has a convex pit recording layer, in which pits are formed in a convex shape viewed from a laser incidence side, and a concave pit recording layer, in which pits are formed in a concave shape viewed from the laser incidence side, as recording layers in which data is recorded by pit strings, the pits being formed with a depth that is set in a range of ?/4.5 to ?/6 with respect to a laser wavelength ?, including: an optical head section that irradiates laser beams on the recording layers and detects reflected light information to read out information recorded in the recording layers; a tracking error signal generating section that generates a tracking signal; a polarity switching section that switches a polarity of the tracking error signal; and a tracking servo section that performs a tracking servo operation.

Abstract: A reproduction apparatus for an optical recording medium that has a convex pit recording layer, in which pits are formed in a convex shape viewed from a laser incidence side, and a concave pit recording layer, in which pits are formed in a concave shape viewed from the laser incidence side, as recording layers in which data is recorded by pit strings, the pits being formed with a depth that is set in a range of ?/4.5 to ?/6 with respect to a laser wavelength ?, including: an optical head section that irradiates laser beams on the recording layers and detects reflected light information to read out information recorded in the recording layers; a tracking error signal generating section that generates a tracking signal; a polarity switching section that switches a polarity of the tracking error signal; and a tracking servo section that performs a tracking servo operation.

Abstract: A sound quality adjustment circuit including a status variable type active band-pass filter having an amplification circuit fed with an input signal and an integration circuit, and a controller for controlling the conversion conductance of the amplification circuit. The center frequency of the status variable type active band-pass filter is continuously varied by controlling the conversion conductance of the amplification circuit by the controller.

Abstract: A laser power control circuit for controlling the laser power is provided in an automatic power control circuit of an optical disc device, an amplitude of an RF signal is examined by the LPC circuit, a control voltage to be applied to the APC circuit is generated, and feedback is applied to control the laser power and stabilize the RF signal level. By this, the reproduction can be stably carried out by even discs having different reflection rates, an improvement of the reproduction capability can be achieved, and a lowering of the optical output of the laser diode accompanied with aging and the lowering of the reproduction capability accompanied with the lowering of the optical output due to dust adhered to the pick-up can be prevented. Further, the laser power per se is controlled, so there is no effect on the band of the RF amplifier.