Patents by Inventor Toshiyuki Ishimaru

Toshiyuki Ishimaru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240290813
    Abstract: An optical detection device including a through electrode is provided. The optical detection device includes a first semiconductor layer having a photoelectric conversion region, a first surface, and a second surface that is a light entrance surface, a second semiconductor layer with a third surface and a fourth surface, a second wiring layer overlapped with the third surface, a third wiring layer overlapped with the fourth surface, a first wiring layer with one surface overlapped with the first surface and another surface overlapped with one of the second wiring layer and the third wiring layer, a first conductor that has a first width, includes a first material, and penetrates the second semiconductor layer in a thickness direction, and a second conductor that has a second width smaller than the first width, includes a second material different from the first material, and penetrates the second semiconductor layer in the thickness direction.
    Type: Application
    Filed: June 16, 2022
    Publication date: August 29, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masaki HANEDA, Kengo KOTOO, Yoshiki SHIRASU, Kazuki SHIMOMURA, Nobutoshi FUJII, Takaaki HIRANO, Yosuke FUJII, Takashi OINOUE, Suguru SAITO, Toshiyuki ISHIMARU, Keiji OHSHIMA, Shinichi IMAI, Takuya KUROTORI, Tomohiro SUGIYAMA, Ikue MITSUHASHI, Kenichi TOKUOKA
  • Patent number: 8361876
    Abstract: A manufacturing method of a semiconductor device includes the steps of: forming first and second alignment marks by forming first and second alignment mark grooves on a first surface of a semiconductor substrate and filling the grooves with a material different from the semiconductor substrate; forming a first element on the first surface in alignment using the first alignment mark; bonding a support substrate to the first surface; reversing a bonded structure of the support substrate and the semiconductor substrate around a predetermined axis and thinning the semiconductor substrate from a second surface side of the semiconductor substrate at least until a thickness with which a position of the second alignment mark is detected by reflected light obtained by application of alignment light from the second surface side of the semiconductor substrate is obtained; and forming a second element on the second surface in alignment using the second alignment mark.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: January 29, 2013
    Assignee: Sony Corporation
    Inventors: Toshiyuki Ishimaru, Kenji Takeo, Ryo Takahashi
  • Patent number: 7921386
    Abstract: Disclosed herein is a fabrication method for a semiconductor device, including a lithography step of connecting a plurality of mask patterns to each other to form a pattern image of an area greater than the size of the mask patterns. The lithography step includes the steps of: assuring an overlapping exposure region to be exposed in an overlapping relationship by both of two mask patterns to be connected to each other, carrying out exposure transfer of the pattern portions of the two mask patterns to the overlapping exposure region to form a first measurement mark and a second measurement mark in the overlapping exposure region, and carrying out positional displacement measurement of pattern connection by the two mask patterns based on a manner of combination of main marks and sub marks of the measurement marks formed in the overlapping exposure region.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: April 5, 2011
    Assignee: Sony Corporation
    Inventor: Toshiyuki Ishimaru
  • Publication number: 20100210088
    Abstract: A manufacturing method of a semiconductor device includes the steps of: forming first and second alignment marks by forming first and second alignment mark grooves on a first surface of a semiconductor substrate and filling the grooves with a material different from the semiconductor substrate; forming a first element on the first surface in alignment using the first alignment mark; bonding a support substrate to the first surface; reversing a bonded structure of the support substrate and the semiconductor substrate around a predetermined axis and thinning the semiconductor substrate from a second surface side of the semiconductor substrate at least until a thickness with which a position of the second alignment mark is detected by reflected light obtained by application of alignment light from the second surface side of the semiconductor substrate is obtained; and forming a second element on the second surface in alignment using the second alignment mark.
    Type: Application
    Filed: February 10, 2010
    Publication date: August 19, 2010
    Applicant: SONY CORPORATION
    Inventors: Toshiyuki Ishimaru, Kenji Takeo, Ryo Takahashi
  • Publication number: 20080268554
    Abstract: Disclosed herein is a fabrication method for a semiconductor device, including a lithography step of connecting a plurality of mask patterns to each other to form a pattern image of an area greater than the size of the mask patterns. The lithography step includes the steps of: assuring an overlapping exposure region to be exposed in an overlapping relationship by both of two mask patterns to be connected to each other, carrying out exposure transfer of the pattern portions of the two mask patterns to the overlapping exposure region to form a first measurement mark and a second measurement mark in the overlapping exposure region, and carrying out positional displacement measurement of pattern connection by the two mask patterns based on a manner of combination of main marks and sub marks of the measurement marks formed in the overlapping exposure region.
    Type: Application
    Filed: April 24, 2008
    Publication date: October 30, 2008
    Applicant: Sony Corporation
    Inventor: Toshiyuki Ishimaru
  • Patent number: 5825468
    Abstract: A substrate is mounted on a stage of an exposure system, and an exposure light is converged on a material formed on the substrate to form a latent image. An auto-focusing light is emitted on the latent image, and the reflected light therefrom is detected. The focusing or defocusing state is judged on the basis of the detected result. When it is judged that the exposure light is defocused on the material formed on the substrate, the drive unit is driven for focus control so as to allow the exposure light to be focused on the material formed on the substrate.
    Type: Grant
    Filed: July 24, 1996
    Date of Patent: October 20, 1998
    Assignee: Sony Corporation
    Inventor: Toshiyuki Ishimaru
  • Patent number: 5574276
    Abstract: There is provided a dust particle inspection apparatus which comprises a laser beam source for emitting a laser beam having a coherence distance longer than 1 km; a scanner for scanning the surface of an article, which is to be inspected, with the emitted laser beam; an optical detector for detecting the laser beam reflected and diffracted on the surface of the article being inspected; a stage for setting the article thereon and displacing the same in a predetermined direction; and a gas supply means for surrounding the article with a high-purity inert gas atmosphere. There is also provided a dust particle inspection method which comprises the steps of surrounding the article under inspection with a high-impurity inert gas atmosphere; while displacing the article in a predetermined direction, scanning the surface of the article with a laser beam having a wavelength .lambda.
    Type: Grant
    Filed: March 29, 1995
    Date of Patent: November 12, 1996
    Assignee: Sony Corporation
    Inventor: Toshiyuki Ishimaru
  • Patent number: 5332627
    Abstract: A field emission type emitter comprises: a conductive substrate; an insulating film formed on the conductive substrate; a cavity formed in the insulating film; a cathode formed on the conductive substrate in the cavity; and a gate electrode formed over the insulating film. The gate electrode is preferably made of refractory metal silicide. A polycrystalline silicon film is preferably formed between the gate electrode and the insulating film. The side walls of the insulating film in the portion of the cavity preferably have an inverse tapered shape.In the case where a glass substrate is used, a conductive film is formed on the glass substrate through an insulating film and the cathode is formed on the conductive film in the cavity. Manufacturing methods of the field emission type emitter are also disclosed.
    Type: Grant
    Filed: October 28, 1991
    Date of Patent: July 26, 1994
    Assignee: Sony Corporation
    Inventors: Hidetoshi Watanabe, Hiroshi Komatsu, Toshiaki Hasegawa, Toshiyuki Ishimaru