Patents by Inventor Toshiyuki Iwamoto
Toshiyuki Iwamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11257832Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the first electrode and the second electrode and on two first-direction sides of the first electrode, a second insulating film provided between the second electrode and the first insulating film and on two first-direction sides of the second electrode, a third insulating film provided between the second electrode and the semiconductor pillar, and a conductive film provided inside a region interposed between the first insulating film and the second insulating film.Type: GrantFiled: August 23, 2017Date of Patent: February 22, 2022Assignee: Kioxia CorporationInventors: Tatsuya Kato, Fumitaka Arai, Katsuyuki Sekine, Toshiyuki Iwamoto, Yuta Watanabe, Wataru Sakamoto, Hiroshi Itokawa
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Patent number: 11183507Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the semiconductor pillar and the second electrode, a second insulating film provided between the first electrode and the second electrode and on two first-direction sides of the first electrode, and a conductive film provided between the second electrode and the second insulating film, the conductive film not contacting the first insulating film.Type: GrantFiled: August 22, 2017Date of Patent: November 23, 2021Assignee: Toshiba Memory CorporationInventors: Katsuyuki Sekine, Tatsuya Kato, Fumitaka Arai, Toshiyuki Iwamoto, Yuta Watanabe, Wataru Sakamoto, Hiroshi Itokawa, Akio Kaneko
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Patent number: 11018148Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the semiconductor pillar and the second electrode, and a second insulating film provided between the first electrode and the second electrode. The second electrode includes a thin sheet portion disposed on the first electrode side, and a thick sheet portion disposed on the semiconductor pillar side. A length in the first direction of the thick sheet portion is longer than a length in the first direction of the thin sheet portion.Type: GrantFiled: September 14, 2017Date of Patent: May 25, 2021Assignee: Toshiba Memory CorporationInventors: Yuta Watanabe, Fumitaka Arai, Katsuyuki Sekine, Toshiyuki Iwamoto, Wataru Sakamoto, Tatsuya Kato
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Publication number: 20210082934Abstract: According to one embodiment, a semiconductor storage device includes: a single-crystal semiconductor substrate having a recessed surface; an under layer provided above the semiconductor substrate; a stacked body, provided over the under layer, that includes at least one conductive layer and at least one insulating layer alternately stacked on top of one another; a single-crystal semiconductor layer extending in a first direction perpendicular to the semiconductor substrate, penetrating the stacked body, and including a first end in contact with the recessed surface of the semiconductor substrate; and a memory film provided between the semiconductor layer and the at least one conductive layer. A crystal orientation of the semiconductor layer and a crystal orientation of the semiconductor substrate are the same.Type: ApplicationFiled: March 3, 2020Publication date: March 18, 2021Applicant: KIOXIA CORPORATIONInventor: Toshiyuki IWAMOTO
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Patent number: 10686045Abstract: A semiconductor memory device according to an embodiment, includes a pair of first electrodes, a semiconductor pillar, an inter-pillar insulating member, a first insulating film, a second electrode, and a second insulating film. The pair of first electrodes are separated from each other, and extend in a first direction. The semiconductor pillar and the inter-pillar insulating member are arranged alternately along the first direction between the pair of first electrodes. The semiconductor pillar and the inter-pillar insulating member extend in a second direction crossing the first direction. The first insulating film is provided at a periphery of the semiconductor pillar. The second electrode is provided between the first insulating film and each electrode of the pair of first electrodes. The second electrode is not provided between the semiconductor pillar and the inter-pillar insulating member. The second insulating film is provided between the second electrode and the first electrode.Type: GrantFiled: August 23, 2017Date of Patent: June 16, 2020Assignee: Toshiba Memory CorporationInventors: Tatsuya Kato, Fumitaka Arai, Katsuyuki Sekine, Toshiyuki Iwamoto, Yuta Watanabe, Wataru Sakamoto
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Patent number: 10541311Abstract: In a semiconductor memory device, first insulating films are arranged along a first direction and a second direction and extend in a third direction. Interconnect is disposed between the first insulating films in the first direction and extends in the third direction. Electrodes are disposed between the first insulating films in the first direction on a second direction side of the interconnect, and is arranged along the third direction. Second insulating film is disposed between the interconnect and the electrodes. Semiconductor members are arranged along the third direction between the first insulating films in the second direction and extend in the first direction. The electrode is disposed between the interconnect and the semiconductor members. Third insulating film is disposed between the electrodes and the semiconductor member and is thicker than the second insulating film.Type: GrantFiled: September 13, 2016Date of Patent: January 21, 2020Assignee: Toshiba Memory CorporationInventors: Katsuyuki Sekine, Tatsuya Kato, Fumitaka Arai, Toshiyuki Iwamoto, Yuta Watanabe, Atsushi Murakoshi
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Patent number: 10418376Abstract: A semiconductor memory device according to one embodiment, includes a first electrode film, a plurality of semiconductor members, and a charge storage member. The first electrode film includes three or more first portions and a second portion connecting the first portions to each other. The first portions extend in a first direction and are arranged along a second direction that intersects with the first direction. The plurality of semiconductor members are arranged along the first direction between the first portions and extending in a third direction. The third direction intersects with a plane containing the first direction and the second direction. The charge storage member is disposed between each of the semiconductor members and each of the first portions. The second portion is disposed between the semiconductor members.Type: GrantFiled: November 21, 2017Date of Patent: September 17, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Koichi Sakata, Yuta Watanabe, Keisuke Kikutani, Satoshi Nagashima, Fumitaka Arai, Toshiyuki Iwamoto
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Patent number: 10263038Abstract: A storage device includes a substrate, first and second insulation layers extending in a first direction, a first conductive layer extending in the first direction between the first and second insulation layers in a second direction perpendicular to the substrate, a second conductive layer extending in the second direction, a variable resistance layer provided between the first and second conductive layers, and a first layer having a first surface contacting the first insulating layer and a second surface contacting the resistance-variable layer in a third direction. The first surface has an incline with respect to the third direction from a first portion to a second portion that is closer to the second surface than the first portion. A distance between the first portion and the second insulating layer in the second direction is larger than a distance between the second portion and the second insulating layer.Type: GrantFiled: August 17, 2018Date of Patent: April 16, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventor: Toshiyuki Iwamoto
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Patent number: 10229924Abstract: A semiconductor memory device according to an embodiment includes first and second semiconductor pillars extending in a first direction and being arranged along a second direction, first and second interconnects extending in a third direction and being provided between the first semiconductor pillar and the second semiconductor pillar, a first electrode provided between the first semiconductor pillar and the first interconnect, a second electrode provided between the second semiconductor pillar and the second interconnect, third and fourth interconnects extending in the second direction, a first contact contacting the first semiconductor pillar and being connected to the third interconnect, and a second contact contacting the second semiconductor pillar and being connected to the fourth interconnect. The third and fourth interconnects each pass through both a region directly above the first semiconductor pillar and a region directly above the second semiconductor pillar.Type: GrantFiled: August 25, 2017Date of Patent: March 12, 2019Assignee: Toshiba Memory CorporationInventors: Wataru Sakamoto, Tatsuya Kato, Yuta Watanabe, Katsuyuki Sekine, Toshiyuki Iwamoto, Fumitaka Arai
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Patent number: 10103155Abstract: A semiconductor memory device according to an embodiment, includes a first semiconductor member, a second semiconductor member, an insulating member, a plurality of electrode films, a first electrode, and a second electrode. The first semiconductor member and the second semiconductor member are separated in a first direction and extending in a second direction. The second direction crosses the first direction. The insulating member is provided between the first semiconductor member and the second semiconductor member. The plurality of electrode films are arranged to be separated from each other along the second direction. Each of the electrode films surrounds the first semiconductor member, the second semiconductor member, and the insulating member when viewed from the second direction. The first electrode is provided between the first semiconductor member and the electrode film. The second electrode is provided between the second semiconductor member and the electrode film.Type: GrantFiled: March 3, 2017Date of Patent: October 16, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kohei Sakaike, Toshiyuki Iwamoto, Tatsuya Kato, Keisuke Kikutani, Fumitaka Arai, Satoshi Nagashima, Koichi Sakata, Yuta Watanabe
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Publication number: 20180233664Abstract: A memory device includes a first interconnection, a second interconnection including a first material, and a variable resistance film between the first interconnection and the second interconnection The variable resistance film includes a first layer including a second material, a second layer between the first layer and the second interconnection and including a third material, a third layer between the first layer and the second layer and including a fourth material, and a fourth layer between the second layer and the second interconnection and including a fifth material. A reactivity of the fourth material with the second material is less than a reactivity of the third material and the second material, and a reactivity of the fifth material with the first material is less than a reactivity of the third material with the first material.Type: ApplicationFiled: September 5, 2017Publication date: August 16, 2018Inventor: Toshiyuki IWAMOTO
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Publication number: 20180097011Abstract: A semiconductor memory device according to one embodiment, includes a first electrode film, a plurality of semiconductor members, and a charge storage member. The first electrode film includes three or more first portions and a second portion connecting the first portions to each other. The first portions extend in a first direction and are arranged along a second direction that intersects with the first direction. The plurality of semiconductor members are arranged along the first direction between the first portions and extending in a third direction. The third direction intersects with a plane containing the first direction and the second direction. The charge storage member is disposed between each of the semiconductor members and each of the first portions. The second portion is disposed between the semiconductor members.Type: ApplicationFiled: November 21, 2017Publication date: April 5, 2018Applicant: Toshiba Memory CorporationInventors: Koichi Sakata, Yuta Watanabe, Keisuke Kikutani, Satoshi Nagashima, Fumitaka Arai, Toshiyuki Iwamoto
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Publication number: 20180006050Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the semiconductor pillar and the second electrode, and a second insulating film provided between the first electrode and the second electrode. The second electrode includes a thin sheet portion disposed on the first electrode side, and a thick sheet portion disposed on the semiconductor pillar side. A length in the first direction of the thick sheet portion is longer than a length in the first direction of the thin sheet portion.Type: ApplicationFiled: September 14, 2017Publication date: January 4, 2018Applicant: Toshiba Memory CorporationInventors: Yuta Watanabe, Fumitaka Arai, Katsuyuki Sekine, Toshiyuki Iwamoto, Wataru Sakamoto, Tatsuya Kato
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Publication number: 20170373082Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the semiconductor pillar and the second electrode, a second insulating film provided between the first electrode and the second electrode and on two first-direction sides of the first electrode, and a conductive film provided between the second electrode and the second insulating film, the conductive film not contacting the first insulating film.Type: ApplicationFiled: August 22, 2017Publication date: December 28, 2017Applicant: Toshiba Memory CorporationInventors: Katsuyuki SEKINE, Tatsuya KATO, Fumitaka ARAI, Toshiyuki IWAMOTO, Yuta WATANABE, Wataru SAKAMOTO, Hiroshi ITOKAWA, Akio KANEKO
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Publication number: 20170352672Abstract: A semiconductor memory device according to an embodiment includes first and second semiconductor pillars extending in a first direction and being arranged along a second direction, first and second interconnects extending in a third direction and being provided between the first semiconductor pillar and the second semiconductor pillar, a first electrode provided between the first semiconductor pillar and the first interconnect, a second electrode provided between the second semiconductor pillar and the second interconnect, third and fourth interconnects extending in the second direction, a first contact contacting the first semiconductor pillar and being connected to the third interconnect, and a second contact contacting the second semiconductor pillar and being connected to the fourth interconnect. The third and fourth interconnects each pass through both a region directly above the first semiconductor pillar and a region directly above the second semiconductor pillar.Type: ApplicationFiled: August 25, 2017Publication date: December 7, 2017Applicant: Toshiba Memory CorporationInventors: Wataru SAKAMOTO, Tatsuya KATO, Yuta WATANABE, Katsuyuki SEKINE, Toshiyuki IWAMOTO, Fumitaka ARAI
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Publication number: 20170352671Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the first electrode and the second electrode and on two first-direction sides of the first electrode, a second insulating film provided between the second electrode and the first insulating film and on two first-direction sides of the second electrode, a third insulating film provided between the second electrode and the semiconductor pillar, and a conductive film provided inside a region interposed between the first insulating film and the second insulating film.Type: ApplicationFiled: August 23, 2017Publication date: December 7, 2017Applicant: Toshiba Memory CorporationInventors: Tatsuya Kato, Fumitaka Arai, Katsuyuki Sekine, Toshiyuki Iwamoto, Yuta Watanabe, Wataru Sakamoto, Hiroshi Itokawa
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Patent number: 9837434Abstract: A semiconductor memory device according to one embodiment, includes a first electrode film, a plurality of semiconductor members, and a charge storage member. The first electrode film includes three or more first portions and a second portion connecting the first portions to each other. The first portions extend in a first direction and are arranged along a second direction that intersects with the first direction. The plurality of semiconductor members are arranged along the first direction between the first portions and extending in a third direction. The third direction intersects with a plane containing the first direction and the second direction. The charge storage member is disposed between each of the semiconductor members and each of the first portions. The second portion is disposed between the semiconductor members.Type: GrantFiled: September 16, 2016Date of Patent: December 5, 2017Assignee: TOSHIBA MEMORY CORPORATIONInventors: Koichi Sakata, Yuta Watanabe, Keisuke Kikutani, Satoshi Nagashima, Fumitaka Arai, Toshiyuki Iwamoto
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Publication number: 20170263637Abstract: A semiconductor memory device according to one embodiment, includes a first electrode film, a plurality of semiconductor members, and a charge storage member. The first electrode film includes three or more first portions and a second portion connecting the first portions to each other. The first portions extend in a first direction and are arranged along a second direction that intersects with the first direction. The plurality of semiconductor members are arranged along the first direction between the first portions and extending in a third direction. The third direction intersects with a plane containing the first direction and the second direction. The charge storage member is disposed between each of the semiconductor members and each of the first portions. The second portion is disposed between the semiconductor members.Type: ApplicationFiled: September 16, 2016Publication date: September 14, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Koichi SAKATA, Yuta WATANABE, Keisuke KlKUTANI, Satoshi NAGASHIMA, Fumitaka ARAI, Toshiyuki IWAMOTO
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Publication number: 20170263615Abstract: A semiconductor memory device according to an embodiment, includes a first semiconductor member, a second semiconductor member, an insulating member, a plurality of electrode films, a first electrode, and a second electrode. The first semiconductor member and the second semiconductor member are separated in a first direction and extending in a second direction. The second direction crosses the first direction. The insulating member is provided between the first semiconductor member and the second semiconductor member. The plurality of electrode films are arranged to be separated from each other along the second direction. Each of the electrode films surrounds the first semiconductor member, the second semiconductor member, and the insulating member when viewed from the second direction. The first electrode is provided between the first semiconductor member and the electrode film. The second electrode is provided between the second semiconductor member and the electrode film.Type: ApplicationFiled: March 3, 2017Publication date: September 14, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Kohei SAKAIKE, Toshiyuki IWAMOTO, Tatsuya KATO, Keisuke KlKUTANI, Fumitaka ARAI, Satoshi NAGASHIMA, Koichi SAKATA, Yuta WATANABE
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Publication number: 20170243945Abstract: In a semiconductor memory device, first insulating films are arranged along a first direction and a second direction and extend in a third direction. Interconnect is disposed between the first insulating films in the first direction and extends in the third direction. Electrodes are disposed between the first insulating films in the first direction on a second direction side of the interconnect, and is arranged along the third direction. Second insulating film is disposed between the interconnect and the electrodes. Semiconductor members are arranged along the third direction between the first insulating films in the second direction and extend in the first direction. The electrode is disposed between the interconnect and the semiconductor members. Third insulating film is disposed between the electrodes and the semiconductor member and is thicker than the second insulating film.Type: ApplicationFiled: September 13, 2016Publication date: August 24, 2017Applicant: KABUSHIKI KAISHA TOSHIBAInventors: KATSUYUKI SEKINE, TATSUYA KATO, FUMITAKA ARAI, TOSHIYUKI IWAMOTO, YUTA WATANABE, ATSUSHI MURAKOSHI