Patents by Inventor Toshiyuki KAKIHARA

Toshiyuki KAKIHARA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10321567
    Abstract: Through the use of a method of producing electronic components, a plurality of electronic components are obtained by cutting, along a predetermined cutting line, a laminate including a first circuit board and a second circuit board both mounted with circuit components. The method of producing electronic components includes: a stacking step of stacking the second circuit board on the first circuit board with a spacer interposed therewith, the first circuit board being provided with a filled via around a mounting region of the circuit components; a filling step of filling a filling space formed between the first circuit board and the second circuit board using the spacer with insulating resins; and a cutting step of cutting the laminate along the cutting line, the cutting line dividing the filled via, and exposing the filled via from a cut surface to acquire terminal portions of the electronic components.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: June 11, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Katsuya Ishikawa, Toshiyuki Kakihara, Takashi Masuda
  • Publication number: 20170223829
    Abstract: Through the use of a method of producing electronic components, a plurality of electronic components are obtained by cutting, along a predetermined cutting line, a laminate including a first circuit board and a second circuit board both mounted with circuit components. The method of producing electronic components includes: a stacking step of stacking the second circuit board on the first circuit board with a spacer interposed therewith, the first circuit board being provided with a filled via around a mounting region of the circuit components; a filling step of filling a filling space formed between the first circuit board and the second circuit board using the spacer with insulating resins; and a cutting step of cutting the laminate along the cutting line, the cutting line dividing the filled via, and exposing the filled via from a cut surface to acquire terminal portions of the electronic components.
    Type: Application
    Filed: May 13, 2015
    Publication date: August 3, 2017
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Katsuya ISHIKAWA, Toshiyuki KAKIHARA, Takashi MASUDA