Patents by Inventor Toshiyuki Kiyokawa

Toshiyuki Kiyokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220137129
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack, and wherein each DUT in the array of DUTs aligns with a respective socket of the plurality of sockets on the interface board. The testing apparatus further comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Application
    Filed: September 20, 2021
    Publication date: May 5, 2022
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Hiroki Ikeda, Toshiyuki Kiyokawa
  • Publication number: 20220011341
    Abstract: A test carrier carried in a state of accommodating a device under test (DUT) includes: a carrier body that holds the DUT, and a lid member that covers the DUT and is attached to the carrier body. The carrier body has a first through-hole for positioning that is provided to face the DUT.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Applicant: ADVANTEST Corporation
    Inventors: Toshiyuki Kiyokawa, Kazuya Ohtani
  • Publication number: 20220011343
    Abstract: A test carrier carried in a state of accommodating a device under test (DUT) includes: a carrier body that holds the DUT; and a lid member that covers the DUT and is attached to the carrier body. The lid member includes: a plate-like main body; and a pusher protruding from the main body in a convex shape.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Applicant: ADVANTEST Corporation
    Inventors: Toshiyuki Kiyokawa, Kazuya Ohtani
  • Publication number: 20220011342
    Abstract: A test carrier carried in a state of accommodating a device under test (DUT) includes: a carrier body that holds the DUT; a lid member that covers the DUT and is attached to the carrier body; and an identifier for identifying an individual of the test carrier.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Applicant: ADVANTEST Corporation
    Inventors: Toshiyuki Kiyokawa, Kazuya Ohtani
  • Publication number: 20220011340
    Abstract: A test carrier carried in a state of accommodating a device under test (DUT) includes: a carrier body that holds the DUT; and a lid member that covers the DUT and is attached to the carrier body. The lid member includes a through-hole for sucking the DUT that is provided to face the DUT and penetrating through the lid member.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Applicant: ADVANTEST Corporation
    Inventors: Toshiyuki Kiyokawa, Kazuya Ohtani
  • Publication number: 20190346482
    Abstract: A test carrier carried in a state of accommodating a device under test (DUT) includes: a carrier body that holds the DUT; and a lid member that covers the DUT and is attached to the carrier body. The carrier body has contactors provided to correspond to terminals of the DUT, external terminals electrically connected to the contactors, and a first through-hole for positioning that is provided to face the DUT. The first through-hole penetrates the carrier body so that a part of the DUT is seen from an outside through the first through-hole.
    Type: Application
    Filed: March 12, 2019
    Publication date: November 14, 2019
    Applicant: ADVANTEST Corporation
    Inventors: Toshiyuki Kiyokawa, Kazuya Ohtani
  • Patent number: 9588142
    Abstract: Provided is an electronic device handling apparatus capable of increasing the number of simultaneous measurements while suppressing the increase in cost. An electronic device handling apparatus, which moves bare dies relative to a probe card, includes: a thermal head which includes a plurality of holding regions each of which holds the bare die and has openings; at least one lift unit which is movably held by the thermal head so as to correspond to the holding regions and is able to advance and retreat through the openings; a moving device which moves the thermal head; and a fixed arm which is able to support the one lift unit.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: March 7, 2017
    Assignee: ADVANTEST CORPORATION
    Inventors: Toshiyuki Kiyokawa, Koya Karino, Daisuke Takano
  • Publication number: 20160116503
    Abstract: Provided is an electronic device handling apparatus capable of increasing the number of simultaneous measurements while suppressing the increase in cost. An electronic device handling apparatus, which moves bare dies relative to a probe card, includes: a thermal head which includes a plurality of holding regions each of which holds the bare die and has openings; at least one lift unit which is movably held by the thermal head so as to correspond to the holding regions and is able to advance and retreat through the openings; a moving device which moves the thermal head; and a fixed arm which is able to support the one lift unit.
    Type: Application
    Filed: October 24, 2014
    Publication date: April 28, 2016
    Applicant: ADVANTEST CORPORATION
    Inventors: Toshiyuki KIYOKAWA, Koya KARINO, Daisuke TAKANO
  • Patent number: 9121901
    Abstract: An apparatus includes a plurality of test heads to which probe cards are electrically connected; a wafer tray which is able to hold a semiconductor wafer; and an alignment apparatus which positions the semiconductor wafer held on the wafer tray relatively with respect to the probe card so as to make the wafer tray face the probe card. The wafer tray has a pressure reducing mechanism which pulls the wafer tray toward the probe card. The alignment apparatus is configured to be able to move along the array direction of the test heads.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: September 1, 2015
    Assignee: ADVANTEST CORPORATION
    Inventors: Toshiyuki Kiyokawa, Takashi Naito
  • Patent number: 8513962
    Abstract: In order to shorten testing time of a plurality of devices under test formed on a semiconductor wafer, a wafer tray used by a test apparatus performing the test is provided. The wafer tray includes a first flow passage for fixing the semiconductor wafer to the wafer tray using vacuum suction, a second flow passage for fixing the wafer tray to the test apparatus using vacuum suction, and a heater for heating a loading surface on which at least the semiconductor wafer is loaded. By using this wafer tray, the semiconductor wafer, which is the object being tested, can be smoothly attached to and detached from different test heads, and testing can be begun quickly after the semiconductor wafer is attached to a test head.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: August 20, 2013
    Assignee: Advantest Corporation
    Inventors: Toshiyuki Kiyokawa, Yoshiharu Umemura
  • Patent number: 8493083
    Abstract: A test apparatus comprising a position information acquiring section that acquires position information concerning first terminals on a surface of a device under test and position information concerning second terminals on a surface of a probe card used for testing the device under test; a control section that calculates a displacement amount between each first terminal and a corresponding second terminal, based on the position information concerning the first terminals and the position information concerning the second terminals, and determines relative positions of the device under test and the probe card such that a maximum value from among the calculated displacement amounts is less than a predetermined value; and an aligning section that adjusts the relative positions of the device under test and the probe card, based on a signal from the control section, and electrically connects the device under test to the probe card.
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: July 23, 2013
    Assignee: Advantest Corporation
    Inventor: Toshiyuki Kiyokawa
  • Patent number: 8299935
    Abstract: A test apparatus comprising a plurality of test units that test a device under test; a plurality of housing sections that respectively house the test units therein; a plurality of opening/closing sections that are disposed respectively in the housing sections and that expose the test units to the outside or isolate the test units from the outside; and a control section that independently controls whether each of the opening/closing sections is allowed to be opened. The control section may allow test units that are not supplied with power to be exposed to the outside. For at least one of (i) a period during which one of the test units is performing a predetermined operation, (ii) a predetermined period before the period during which one of the test units is performing the predetermined operation, and (iii) a predetermined period after the period during which one of the test units is performing the predetermined operation, the control section may prohibit other test units from being exposed to the outside.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: October 30, 2012
    Assignee: Advantest Corporation
    Inventors: Toshiyuki Kiyokawa, Toshikazu Okawa
  • Publication number: 20110316571
    Abstract: An apparatus includes a plurality of test heads to which probe cards are electrically connected; a wafer tray which is able to hold a semiconductor wafer; and an alignment apparatus which positions the semiconductor wafer held on the wafer tray relatively with respect to the probe card so as to make the wafer tray face the probe card. The wafer tray has a pressure reducing mechanism which pulls the wafer tray toward the probe card. The alignment apparatus is configured to be able to move along the array direction of the test heads.
    Type: Application
    Filed: February 12, 2009
    Publication date: December 29, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Toshiyuki Kiyokawa, Takashi Naito
  • Publication number: 20110298630
    Abstract: A test apparatus comprising a plurality of test units that test a device under test; a plurality of housing sections that respectively house the test units therein; a plurality of opening/closing sections that are disposed respectively in the housing sections and that expose the test units to the outside or isolate the test units from the outside; and a control section that independently controls whether each of the opening/closing sections is allowed to be opened. The control section may allow test units that are not supplied with power to be exposed to the outside. For at least one of (i) a period during which one of the test units is performing a predetermined operation, (ii) a predetermined period before the period during which one of the test units is performing the predetermined operation, and (iii) a predetermined period after the period during which one of the test units is performing the predetermined operation, the control section may prohibit other test units from being exposed to the outside.
    Type: Application
    Filed: August 16, 2010
    Publication date: December 8, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Toshiyuki KIYOKAWA, Toshikazu OKAWA
  • Publication number: 20110128024
    Abstract: A test apparatus comprising a position information acquiring section that acquires position information concerning first terminals on a surface of a device under test and position information concerning second terminals on a surface of a probe card used for testing the device under test; a control section that calculates a displacement amount between each first terminal and a corresponding second terminal, based on the position information concerning the first terminals and the position information concerning the second terminals, and determines relative positions of the device under test and the probe card such that a maximum value from among the calculated displacement amounts is less than a predetermined value; and an aligning section that adjusts the relative positions of the device under test and the probe card, based on a signal from the control section, and electrically connects the device under test to the probe card.
    Type: Application
    Filed: August 26, 2010
    Publication date: June 2, 2011
    Applicant: ADVANTEST CORPORATION
    Inventor: Toshiyuki KIYOKAWA
  • Publication number: 20110043237
    Abstract: In order to shorten testing time of a plurality of devices under test formed on a semiconductor wafer, a wafer tray used by a test apparatus performing the test is provided. The wafer tray includes a first flow passage for fixing the semiconductor wafer to the wafer tray using vacuum suction, a second flow passage for fixing the wafer tray to the test apparatus using vacuum suction, and a heater for heating a loading surface on which at least the semiconductor wafer is loaded. By using this wafer tray, the semiconductor wafer, which is the object being tested, can be smoothly attached to and detached from different test heads, and testing can be begun quickly after the semiconductor wafer is attached to a test head.
    Type: Application
    Filed: September 13, 2010
    Publication date: February 24, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Toshiyuki KIYOKAWA, Yoshiharu UMEMURA
  • Patent number: 7298156
    Abstract: A holding side contact arm (317) for holding an IC to be tested is positioned on the optical axis (OP) of an alignment CCD camera (326) of an alignment device (320), the IC to be tested is inserted to a first opening (321a) formed on an alignment movable portion (321), and a contact member (317d) of the holding side contact arm (317) is brought to contact the alignment movable portion (321). Then, an alignment amount for correcting a position of the IC to be tested is calculated by taking an image by the camera (326) and performing image processing. A lock-and-free means (318) provided to a first contact arm (315a1) is made to be in a non-restricted state, a movable portion driving device (322) is driven based on the alignment amount, and the holding side contact arm (317) contacting the alignment movable portion (321) is moved with respect to a root side contact arm (316), so that alignment of a position of the IC to be tested is performed.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: November 20, 2007
    Assignee: ADVANTEST Corporation
    Inventors: Hiroshi Okuda, Toshiyuki Kiyokawa, Haruki Nakajima
  • Publication number: 20070159532
    Abstract: An image sensor test apparatus that emits light to a light receiving surface of an image sensor (DUT) and inputs and outputs electrical signals from a contact part to input and output terminals of the image sensor so as to test the image sensor (DUT) for optical characteristics, which captures an image of the image sensor (DUT) in the state held by a contact arm (315) by a first camera (326), recognizes a relative position of the image sensor (DUT) with respect to the contact part by image processing, adds a precalculated amount of deviation of an optical axis of the image sensor (DUT) with respect to an optical axis of a light source to that relative position to calculate an amount of alignment of the image sensor (DUT), drives a drive unit (322) based on this, and moves a holding side arm (317) abutting against a movable stage (321) with a lock-and L-free mechanism (318) in a free state.
    Type: Application
    Filed: March 31, 2004
    Publication date: July 12, 2007
    Applicant: ADVANTEST CORPORATION
    Inventor: Toshiyuki Kiyokawa
  • Publication number: 20050151551
    Abstract: A holding side contact arm (317) for holding an IC to be tested is positioned on the optical axis (OP) of an alignment CCD camera (326) of an alignment device (320), the IC to be tested is inserted to a first opening (321a) formed on an alignment movable portion (321), and a contact member (317d) of the holding side contact arm (317) is brought to contact the alignment movable portion (321). Then, an alignment amount for correcting a position of the IC to be tested is calculated by taking an image by the camera (326) and performing image processing. A lock-and-free means (318) provided to a first contact arm (315a1) is made to be in a non-restricted state, a movable portion driving device (322) is driven based on the alignment amount, and the holding side contact arm (317) contacting the alignment movable portion (321) is moved with respect to a root side contact arm (316), so that alignment of a position of the IC to be tested is performed.
    Type: Application
    Filed: December 3, 2002
    Publication date: July 14, 2005
    Applicant: ADVANTEST Corporation
    Inventors: Hiroshi Okuda, Toshiyuki Kiyokawa, Haruki Nakajima
  • Patent number: 6590383
    Abstract: A contact arm for bringing ICs to be tested to contact a contact portion, includes a holding head for holding said electronic devices, a floating mechanism provided between a drive mechanism for moving close to or away from said contact portion and said holding head for supporting said holding head movable about said drive mechanism, a diaphragm cylinder provided between said drive mechanism and said holding head for adjusting a relative pressing pressure from said drive mechanism to said holding head. A plurality of diaphragm cylinders are provided to one holding head.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: July 8, 2003
    Assignee: Advantest Corporation
    Inventors: Tsuyoshi Yamashita, Toshiyuki Kiyokawa