Abstract: According to an aspect, a detection apparatus includes: an optical sensor including a sensor base member and a plurality of photoelectric conversion elements that are provided on the sensor base member and each of which is configured to output a signal corresponding to light emitted to the photoelectric conversion element; and a lighting device including a plurality of first light-emitting elements configured to emit first light having a first maximum emission wavelength and a plurality of second light-emitting elements configured to emit second light having a second maximum emission wavelength. Each of the photoelectric conversion elements has responsivity in a wavelength region including a wavelength region of the first light and a wavelength region of the second light.

Abstract: When a first dummy master device receives a signal indicating that valid data is present, in place of a first master device, the first dummy master device outputs a signal indicating that signal reception is possible. A selector is configured to connect one of the first master device and the first dummy master device to a bus. A system controller is configured to cause only a master device to which a failure occurs to be reset, among a plurality of master devices. A selector control circuit is configured to control the selector to connect the first dummy master device to the bus when the first master device is in a failure state.

Abstract: A multi-thread processor includes a plurality of hardware threads each of which generates an independent instruction flow, a first thread scheduler that continuously outputs a thread selection signal uniformly in a first period of a cycle of the first schedule pattern in accordance with a first schedule pattern or continuously outputs the thread selection signal uniformly in a second period of a cycle of the second schedule pattern in accordance with a second schedule pattern, the thread selection signal designating a hardware thread to be executed in a next execution cycle from among the plurality of hardware threads, a first selector that selects one of the plurality of hardware threads according to the thread selection signal and outputs an instruction generated by the selected hardware thread from among the plurality of hardware threads, and an execution pipeline that executes an instruction output from the first selector.

Abstract: A multi-thread processor includes a plurality of hardware threads each of which generates an independent instruction flow, a first thread scheduler that continuously outputs a thread selection signal uniformly in a first period of a cycle of the first schedule pattern in accordance with a first schedule pattern or continuously outputs the thread selection signal uniformly in a second period of a cycle of the second schedule pattern in accordance with a second schedule pattern, the thread selection signal designating a hardware thread to be executed in a next execution cycle from among the plurality of hardware threads, a first selector that selects one of the plurality of hardware threads according to the thread selection signal and outputs an instruction generated by the selected hardware thread from among the plurality of hardware threads, and an execution pipeline that executes an instruction output from the first selector.

Abstract: In an exemplary aspect, the present invention provides a multi-thread processor including a plurality of hardware threads each of which generates an independent instruction flow, a thread scheduler that outputs a thread selection signal in accordance with a first or second schedule, the thread selection signal designating a hardware thread to be executed in a next execution cycle among the plurality of hardware threads, a first selector that selects one of the plurality of hardware threads according to the thread selection signal and outputs an instruction generated by the selected hardware thread, and an execution pipeline that executes an instruction output from the first selector, wherein when the multi-thread processor is in a first state, the thread scheduler selects the first schedule, and when the multi-thread processor is in a second state, the thread scheduler selects the second schedule.

Abstract: An information recording medium is provided that has high recording sensitivity and high erasability, even when a recording layer thereof is as thin as about 3 nm. An information recording medium 15 on which information can be recorded by applying light or electrical energy has at least a recording layer 104 that undergoes phase change, while the recording layer 104 contains at least one element selected from among Zn, Si and C, and Sb in total proportion of 85 atomic % or more and has a composition preferably represented by the formula Sb100-a1M1a1 (atomic %) (wherein M1 represents at least one element selected from among Zn, Si and C, and a1 is a proportion in terms of atomic % that satisfies a relationship of 0<a1?50).

Abstract: A voltage drop measurement circuit includes a voltage drop circuit to generate an output voltage and fluctuate the output voltage according to a fluctuation in a power supply voltage, where the output voltage being the power supply voltage dropped by a predetermined amount and a flip-flop to retain a flag indicating a drop in the power supply voltage according to the output voltage.

Abstract: In an exemplary aspect, the present invention provides a multi-thread processor including a plurality of hardware threads each of which generates an independent instruction flow, a thread scheduler that outputs a thread selection signal in accordance with a first or second schedule, the thread selection signal designating a hardware thread to be executed in a next execution cycle among the plurality of hardware threads, a first selector that selects one of the plurality of hardware threads according to the thread selection signal and outputs an instruction generated by the selected hardware thread, and an execution pipeline that executes an instruction output from the first selector, wherein when the multi-thread processor is in a first state, the thread scheduler selects the first schedule, and when the multi-thread processor is in a second state, the thread scheduler selects the second schedule.

Abstract: An information recording medium is provided that has high recording sensitivity and high erasability, even when a recording layer thereof is as thin as about 3 nm. An information recording medium 15 on which information can be recorded by applying light or electrical energy has at least a recording layer 104 that undergoes phase change, while the recording layer 104 contains at least one element selected from among Zn, Si and C, and Sb in total proportion of 85 atomic % or more and has composition preferably represented by the formula Sb100-a1M1a (atomic %) (wherein M1 represents at least one element selected from among Zn, Si and C, and al is a proportion in term of atomic % that satisfies a relationship of 0<a1?50).

Abstract: A voltage drop measurement circuit includes a voltage drop circuit to generate an output voltage and fluctuate the output voltage according to a fluctuation in a power supply voltage, where the output voltage being the power supply voltage dropped by a predetermined amount and a flip-flop to retain a flag indicating a drop in the power supply voltage according to the output voltage.

Abstract: A piezoelectric film device has a piezoelectric film element and a power supply circuit. The piezoelectric film element is formed of a first electrode, a second electrode, and a piezoelectric film that is sandwiched between the first electrode and second electrode and has a polarization vector in the film thickness direction. The polarization vector is inverted by application of a predetermined voltage or higher through the first electrode and second electrode. The power supply circuit supplies voltage for inverting the polarization vector. The piezoelectric film has each different lattice constant depending on the direction of the polarization vector. The piezoelectric film device keeps a different displacement position corresponding to the direction of the polarization vector even when the voltage application is stopped.

Abstract: In a piezoelectric element comprising a first electrode 2 provided on a substrate 1, a piezoelectric material 3 provided on the first electrode 2 and a second electrode 4 provided on the piezoelectric material 3, the piezoelectric material 3 is configured so as to have a perovskite type crystal structure which is represented by a formula ABO3 and in which the main component for the A site is Pb and the main components for the B site are Zr, Ti and Pb, and configured so that a ratio of Pb atoms to all atoms in the B site is more than 3% and not more than 30%. Namely, the piezoelectric material 3 is formed so as to contain Pb excessively and the excess Pb atoms are activated to be Pb4+ during formation of the piezoelectric material 3 and then introduced into the B site.

Abstract: A piezoelectric film device has a piezoelectric film element and a power supply circuit. The piezoelectric film element is formed of a first electrode, a second electrode, and a piezoelectric film that is sandwiched between the first electrode and second electrode and has a polarization vector in the film thickness direction. The polarization vector is inverted by application of a predetermined voltage or higher through the first electrode and second electrode. The power supply circuit supplies voltage for inverting the polarization vector. The piezoelectric film has each different lattice constant depending on the direction of the polarization vector. The piezoelectric film device keeps a different displacement position corresponding to the direction of the polarization vector even when the voltage application is stopped.

Abstract: An information recording medium having such a recording material layer on a substrate where reversible phase change between electrically or optically detectable states can be caused by electric energy or electromagnetic energy. The recording material forming the recording layer is either a material having a crystal structure including lattice defects in one phase of the reversible phase change or a material having a complex phase composed of a crystal portion including a lattice defect in one phase of the reversible phase change and an amorphous portion. Both portions contain a common element. A part of the lattice defects are filled with an element other than the element constituting the crystal structure. The recording medium having a recording thin film exhibits little variation of the recording and reproduction characteristics even after repetition of recording and reproduction, excellent weatherability, strong resistance against composition variation, and easily controllable characteristics.

Abstract: An information recording medium having such a recording material layer on a substrate where reversible phase change between electrically or optically detectable states can be caused by electric energy or electromagnetic energy. The recording material forming the recording layer is either a material having a crystal structure including lattice defects in one phase of the reversible phase change or a material having a complex phase composed of a crystal portion including a lattice defect in one phase of the reversible phase change and an amorphous portion. Both portions contain a common element. A part of the lattice defects are filled with an element other than the element constituting the crystal structure. The recording medium having a recording thin film exhibits little variation of the recording and reproduction characteristics even after repetition of recording and reproduction, excellent weatherability, strong resistance against composition variation, and easily controllable characteristics.

Abstract: An information recording medium having such a recording material layer on a substrate where reversible phase change between electrically or optically detectable states can be caused by electric energy or electromagnetic energy. The recording material forming the recording layer is either a material having a crystal structure including lattice defects in one phase of the reversible phase change or a material having a complex phase composed of a crystal portion including a lattice defect in one phase of the reversible phase change and an amorphous portion. Both portions contain a common element. A part of the lattice defects are filled with an element other than the element constituting the crystal structure. The recording medium having a recording thin film exhibits little variation of the recording and reproduction characteristics even after repetition of recording and reproduction, excellent weatherability, strong resistance against composition variation, and easily controllable characteristics.

Abstract: In a piezoelectric element comprising a first electrode 2 provided on a substrate 1, a piezoelectric material 3 provided on the first electrode 2 and a second electrode 4 provided on the piezoelectric material 3, the piezoelectric material 3 is configured so as to have a perovskite type crystal structure which is represented by a formula ABO3 and in which the main component for the A site is Pb and the main components for the B site are Zr, Ti and Pb, and configured so that a ratio of Pb atoms to all atoms in the B site is more than 3% and not more than 30%. Namely, the piezoelectric material 3 is formed so as to contain Pb excessively and the excess Pb atoms are activated to be Pb4+ during formation of the piezoelectric material 3 and then introduced into the B site.