Patents by Inventor Toshiyuki Morimoto

Toshiyuki Morimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972229
    Abstract: Semiconductor devices and multiply-accumulate operation devices are disclosed. In one example, a semiconductor device includes synapses in which a nonvolatile variable resistance element taking a first resistance value and a second resistance value lower than the first resistance value and a fixed resistance element having a resistance value higher than the second resistance value are connected in series. An output line outputs a sum of currents flowing through the plurality of synapses.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: April 30, 2024
    Assignees: Sony Group Corporation, Sony Semiconductor Solutions Corporation
    Inventors: Toshiyuki Kobayashi, Rui Morimoto, Jun Okuno, Masanori Tsukamoto, Yusuke Shuto
  • Publication number: 20230003430
    Abstract: According to one embodiment, a refrigeration cycle apparatus includes a motor which including a plurality of phase windings in a mutually unconnected state, a first inverter which controls application of electric power to one ends of the phase windings, a second inverter which controls application of electric power to the other ends of the phase windings, switches connected between the other ends of the phase windings, and a motor controller which selectively sets one of an open-windings mode and a star-connection mode. The motor controller sets, at the time of startup of the motor, the open-windings mode.
    Type: Application
    Filed: September 9, 2022
    Publication date: January 5, 2023
    Inventors: Hiroaki MATSUMOTO, Toshiyuki MORIMOTO, Yasuharu HAYASAKA
  • Publication number: 20170248336
    Abstract: According to one embodiment, an outdoor unit equipped with a communication unit and a controller. The communication unit communicates data in a noncontact manner to an information terminal close to the outdoor unit. The controller permits the setting of data that has been input from the information terminal via the communication unit only during a fixed period of time after the outdoor unit has been turned on.
    Type: Application
    Filed: May 12, 2017
    Publication date: August 31, 2017
    Applicant: Toshiba Carrier Corporation
    Inventors: Hiromasa Yamane, Toshiyuki Morimoto
  • Patent number: 7078343
    Abstract: Compound-semiconductor-wafer manufacturing whereby particle adherence, and obverse-surface oxidization and alteration are slight and the use of organic solvents is reduced. An adsorption pad is bonded to a polishing plate, and a wafer being adsorbed onto the adsorption pad without using wax is polished and thereafter stored within purified water without drying. Since storage is within purified water, particle adherence, and obverse-surface oxidization and alteration turn out to be slight, yielding a high-quality wafer. In the cleaning procedure following the aquatic storage, organic solvent washing is omitted. This allows the use/waste volume of noxious organic solvent to be reduced.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: July 18, 2006
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takatoshi Okamoto, Yoshio Mezaki, Toshiyuki Morimoto
  • Publication number: 20030104696
    Abstract: Compound-semiconductor-wafer manufacturing whereby particle adherence, and obverse-surface oxidization and alteration are slight and the use of organic solvents is reduced. An adsorption pad is bonded to a polishing plate, and a wafer being adsorbed onto the adsorption pad without using wax is polished and thereafter stored within purified water without drying. Since storage is within purified water, particle adherence, and obverse-surface oxidization and alteration turn out to be slight, yielding a high-quality wafer. In the cleaning procedure following the aquatic storage, organic solvent washing is omitted. This allows the use/waste volume of noxious organic solvent to be reduced.
    Type: Application
    Filed: October 19, 2002
    Publication date: June 5, 2003
    Inventors: Takatoshi Okamoto, Yoshio Mezaki, Toshiyuki Morimoto
  • Patent number: 6294019
    Abstract: In the present method, a group III-V compound semiconductor wafer includes a substrate consisting of a group III-V compound whose outer peripheral edge portion is so chamfered that its section has an arcuate shape substantially with a radius R, and an epitaxial layer consisting of a group III-V compound layer formed on the substrate. A portion of the wafer is removed at the outer peripheral edge thereof, up to a distance L from the original peripheral edge, and the distance L satisfies the expression R≦L≦3L. thereby an abnormally grown part of the epitaxial layer is reliably removed.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: September 25, 2001
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshiki Miura, Toshiyuki Morimoto