Patents by Inventor Toshiyuki Motooka

Toshiyuki Motooka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6700198
    Abstract: In order to improve adhesion between a plated film which functions as an external connection terminal of a semiconductor device and a surface of a resin protuberance and to improve reliability, a carrier substrate includes a metal substrate which is shaped into a sheet form, to which a semiconductor chip is fixed, and which is removed before the semiconductor device is completed, a recess formed at a position of the metal substrate corresponding to the resin protuberance and having a rugged bottom surface and/or a rugged side surface, and a plated film formed on the inner surface of the recess.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: March 2, 2004
    Assignees: Shinko Electric Industries Co., Ltd., Fujitsu Limited
    Inventors: Hideki Toya, Mitsuyoshi Imai, Masaki Sakaguchi, Naoki Yamabe, Mamoru Suwa, Toshiyuki Motooka, Hideharu Sakoda, Muneharu Morioka
  • Patent number: 6573121
    Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts. Outer circumference surfaces of the resin package are upright surfaces defined by cutting.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: June 3, 2003
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Ryuji Nomoto, Toshiyuki Motooka, Kazuto Tsuji, Junichi Kasai, Toshimi Kawahara, Hideharu Sakoda, Kenji Itasaka, Terumi Kamifukumoto
  • Patent number: 6376921
    Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: April 23, 2002
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Ryuji Nomoto, Toshiyuki Motooka, Kazuto Tsuji, Junichi Kasai, Toshimi Kawahara, Hideharu Sakoda, Kenji Itasaka, Terumi Kamifukumoto
  • Publication number: 20020027265
    Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts. Outer circumference surfaces of the resin package are upright surfaces defined by cutting.
    Type: Application
    Filed: March 16, 2001
    Publication date: March 7, 2002
    Applicant: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Ryuji Nomoto, Toshiyuki Motooka, Kazuto Tsuji, Junichi Kasai, Toshimi Kawahara, Hideharu Sakoda, Kenji Itasaka, Terumi Kamifukumoto
  • Patent number: 6348416
    Abstract: In order to improve adhesion between a plated film which functions as an external connection terminal of a semiconductor device and a surface of a resin protuberance and to improve reliability, a carrier substrate includes a metal substrate 12 which is shaped into a sheet form, to which a semiconductor chip is fixed, and which is removed before the semiconductor device is completed, a recess 16 formed at a position of the metal substrate 12 corresponding to the resin protuberance and having a rugged bottom surface 16a and/or a rugged side surface, and a plated film 14 formed on the inner surface of the recess 16.
    Type: Grant
    Filed: December 6, 1999
    Date of Patent: February 19, 2002
    Assignees: Shinko Electric Industries Co., Ltd, Fujitsu Limited
    Inventors: Hideki Toya, Mitsuyoshi Imai, Masaki Sakaguchi, Naoki Yamabe, Mamoru Suwa, Toshiyuki Motooka, Hideharu Sakoda, Muneharu Morioka
  • Publication number: 20020019133
    Abstract: In order to improve adhesion between a plated film which functions as an external connection terminal of a semiconductor device and a surface of a resin protuberance and to improve reliability, a carrier substrate includes a metal substrate which is shaped into a sheet form, to which a semiconductor chip is fixed, and which is removed before the semiconductor device is completed, a recess formed at a position of the metal substrate corresponding to the resin protuberance and having a rugged bottom surface and/or a rugged side surface, and a plated film formed on the inner surface of the recess.
    Type: Application
    Filed: October 5, 2001
    Publication date: February 14, 2002
    Applicant: Shinko Electric Industries Co., Ltd
    Inventors: Hideki Toya, Mitsuyoshi Imai, Masaki Sakaguchi, Naoki Yamabe, Mamoru Suwa, Toshiyuki Motooka, Hideharu Sakoda, Muneharu Morioka
  • Patent number: 6339261
    Abstract: A semiconductor device which comprises a semiconductor chip packaged in a resin package and having an electrode terminal wire-bonded to a conductor cap having one end defining an exposed top of an external connection terminal protruding from the resin package and the other end defining an orifice embedded in the resin package, wherein the orifice of the conductor cap has a radially outward extending flange which anchors the conductor cap to the resin package. The process of producing the semiconductor device is also disclosed.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: January 15, 2002
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Yonemochi, Toshiyuki Motooka, Hideharu Sakoda, Muneharu Morioka, Mamoru Suwa
  • Publication number: 20010001714
    Abstract: A method of fabricating a semiconductor device includes a step of attaching a circuit substrate on a semiconductor wafer in alignment with each other, providing an electrical interconnection between the circuit substrate and semiconductor devices formed in the wafer, providing solder bumps on the circuit substrate, and dicing the semiconductor wafer together with the circuit substrate thereon along a scribe line.
    Type: Application
    Filed: January 24, 2001
    Publication date: May 24, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Toshiyuki Motooka, Yoshiyuki Yoneda, Ryuji Nomoto, Toshimi Kawahara, Junichi Kasai
  • Patent number: 6207477
    Abstract: A method of fabricating a semiconductor device includes a step of attaching a circuit substrate on a semiconductor wafer in alignment with each other, providing an electrical interconnection between the circuit substrate and semiconductor devices formed in the wafer, providing solder bumps on the circuit substrate, and dicing the semiconductor wafer together with the circuit substrate thereon along a scribe line.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: March 27, 2001
    Assignee: Fujitsu Limited
    Inventors: Toshiyuki Motooka, Yoshiyuki Yoneda, Ryuji Nomoto, Toshimi Kawahara, Junichi Kasai
  • Patent number: 5937277
    Abstract: A method of forming a semiconductor device having a semiconductor chip having electrodes on which electrode pins are formed includes the steps of forming a complex having the electrode pins fixed in a fixing member, an arrangement of the electrode pins corresponding to that of the electrodes, connecting the electrode pins with the electrodes by mounting the complex on the semiconductor chip, and removing the fixing member from the complex mounted on the semiconductor chip.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: August 10, 1999
    Assignee: Fujitsu Limited
    Inventors: Tatsuharu Matsuda, Masataka Mizukoshi, Masaharu Minamizawa, Toshiyuki Motooka
  • Patent number: 5854558
    Abstract: A test board used for testing a semiconductor device provided with projection electrodes includes a main board and testing electrodes. The testing electrodes are provided on the main board, each projecting upwardly from the main board. When the semiconductor device is tested, the testing electrodes are electrically connected to the projection electrodes by insertion of the testing electrodes into the projection electrodes. The semiconductor device is mounted on the main board to test the semiconductor device through the testing electrodes.
    Type: Grant
    Filed: September 21, 1995
    Date of Patent: December 29, 1998
    Assignee: Fujitsu Limited
    Inventors: Toshiyuki Motooka, Syuichirou Takahashi, Tatsuharu Matsuda, Kunio Kodama, Jouji Fujimori
  • Patent number: 5831441
    Abstract: A test board used for testing a semiconductor device provided with projection electrodes includes a main board and testing electrodes. The testing electrodes are provided on the main board, each projecting upwardly from the main board. When the semiconductor device is tested, the testing electrodes are electrically connected to the projection electrodes by insertion of the testing electrodes into the projection electrodes. The semiconductor device is mounted on the main board to test the semiconductor device through the testing electrodes.
    Type: Grant
    Filed: March 8, 1996
    Date of Patent: November 3, 1998
    Assignee: Fujitsu Limited
    Inventors: Toshiyuki Motooka, Syuichirou Takahasi, Tatsuharu Matsuda, Kunio Kodama, Joji Fujimori, Shigeki Harada, Masataka Mizukoshi, Masashi Takenaka, Tatsuro Yamashita
  • Patent number: 5637535
    Abstract: A method of forming a semiconductor device having a semiconductor chip having electrodes on which electrode pins are formed includes the steps of forming a complex having the electrode pins fixed in a fixing member, an arrangement of the electrode pins corresponding to that of the electrodes, connecting the electrode pins with the electrodes by mounting the complex on the semiconductor chip, and removing the fixing member from the complex mounted on the semiconductor chip.
    Type: Grant
    Filed: January 11, 1995
    Date of Patent: June 10, 1997
    Assignee: Fujitsu Limited
    Inventors: Tatsuharu Matsuda, Masataka Mizukoshi, Masaharu Minamizawa, Toshiyuki Motooka