Patents by Inventor Toshiyuki Nakayama

Toshiyuki Nakayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128887
    Abstract: A first voltage control circuitry controls a first representative value, i.e., an average-value corresponding value of DC capacitor voltages of all converter cells to follow an overall voltage command value. A phase balance control circuitry controls second representative values, i.e., average-value corresponding values of DC capacitor voltages of the converter cells in leg circuits for respective phases to follow the first representative value. A positive-negative balance control circuitry controls deviations of third representative values, i.e., average-value corresponding values of the DC capacitor voltages of the converter cells in the positive and negative arms of the leg circuits for respective phases to become zero between the positive and negative arms. An individual balance control circuitry controls DC capacitor voltages of all the converter cells to follow the third representative values.
    Type: Application
    Filed: April 5, 2021
    Publication date: April 18, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Miwako TANAKA, Toshiyuki FUJII, Takuya KAJIYAMA, Akito NAKAYAMA
  • Patent number: 6853086
    Abstract: A method of manufacture of a semiconductor device comprises a step of providing an adhesive (30) between a semiconductor chip (20) and a substrate (10), a step of positioning electrodes (22) and leads (12) to oppose each other, and a step of applying pressure in the direction of making the gap between the semiconductor chip (20) and substrate (10) narrower, and on the substrate (10), in a region opposing the surface of the semiconductor chip (20) and avoiding the leads (12), a film (14) is formed with lower adhesion with the adhesive (30) than the substrate (10).
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: February 8, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Toshiyuki Nakayama