Abstract: A direct digital synthesizer (DDS) 3 comprises a phase accumulator for generating phase data in response to frequency data, periodic signal converters for generating a sine signal and a cosine signal in response to the upper bits of the phase data, phase error signal generating means for generating a phase error signal in response to the lower bits of the phase data, a multiplier for multiplying the cosine signal and the phase error signal to produce a spurious cancel signal, and a subtracter 35 for subtracting the spurious cancel signal from the sine signal, thereby obtaining a resultant sine signal free from spurious noise.

Abstract: A synthesizer for use in a transmitter/receiver effectively eliminates spurious signals contained in an output signal. The synthesizer has a direct digital synthesizer for producing an output signal having a frequency corresponding to oscillation frequency data, and a voltage-controlled variable bandpass filter to which the output signal from the direct digital synthesizer is supplied. The oscillation frequency data is also supplied to a ROM, from which control voltage data corresponding to the supplied oscillation frequency data is read. The control voltage data from the ROM is supplied to a D/A converter which applies a control voltage to the voltage-controlled variable bandpass filter. The center frequency of the passband of the voltage-controlled variable bandpass filter is controlled by the applied control voltage in conformity with the frequency of the output signal from the direct digital synthesizer.