Patents by Inventor Toshiyuki Yamagishi

Toshiyuki Yamagishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220206892
    Abstract: A memory system includes a non-volatile memory including at least one memory cell, a buffer, and a memory controller. The memory controller acquires first data from the buffer. The first data includes a plurality of bits of data. The memory controller generates second data by performing a randomization process on the first data, generates a flag that is information used to identify an error suppression encoding process, based on the second data, and stores the flag in the buffer. The memory controller acquires third data and the flag from the buffer. The third data is 1-bit data of the first data. The memory controller generates storage data by performing the error suppression encoding process based on the acquired flag and the randomization process on the third data, and writes the storage data into the memory cell.
    Type: Application
    Filed: July 2, 2021
    Publication date: June 30, 2022
    Applicant: Kioxia Corporation
    Inventors: Yasuyuki IMAIZUMI, Tokumasa HARA, Toshiyuki YAMAGISHI
  • Patent number: 11372719
    Abstract: A memory system includes a non-volatile memory including at least one memory cell, a buffer, and a memory controller. The memory controller acquires first data from the buffer. The first data includes a plurality of bits of data. The memory controller generates second data by performing a randomization process on the first data, generates a flag that is information used to identify an error suppression encoding process, based on the second data, and stores the flag in the buffer. The memory controller acquires third data and the flag from the buffer. The third data is 1-bit data of the first data. The memory controller generates storage data by performing the error suppression encoding process based on the acquired flag and the randomization process on the third data, and writes the storage data into the memory cell.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: June 28, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Yasuyuki Imaizumi, Tokumasa Hara, Toshiyuki Yamagishi
  • Patent number: 10970166
    Abstract: A memory system of an embodiment includes a memory controller and a non-volatile memory. The memory controller executes error correction encoding on user data received from a host to generate first encoded data, adds the first encoded data to each of one or more pieces of second encoded data, obtained by performing error correction encoding on each of one or more pieces of predetermined data, to generate one or more pieces of third encoded data, obtained by executing error mitigation encoding on the first encoded data, and selects any one piece of encoded data from the first encoded data and the one or more pieces of third encoded data. The non-volatile memory stores the selected encoded data.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: April 6, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Toshiyuki Yamagishi
  • Publication number: 20200264951
    Abstract: A memory system of an embodiment includes a memory controller and a non-volatile memory. The memory controller executes error correction encoding on user data received from a host to generate first encoded data, adds the first encoded data to each of one or more pieces of second encoded data, obtained by performing error correction encoding on each of one or more pieces of predetermined data, to generate one or more pieces of third encoded data, obtained by executing error mitigation encoding on the first encoded data, and selects any one piece of encoded data from the first encoded data and the one or more pieces of third encoded data. The non-volatile memory stores the selected encoded data.
    Type: Application
    Filed: July 26, 2019
    Publication date: August 20, 2020
    Applicant: Toshiba Memory Corporation
    Inventor: Toshiyuki Yamagishi
  • Patent number: 10326626
    Abstract: A semiconductor device of an embodiment includes first and second couplers, an encoding circuit, and a demodulating circuit. The encoding circuit executes differential Manchester encoding on digital data based on a clock inputted thereto via the first coupler and outputs an encoded data. The demodulating circuit includes a first sampling circuit which samples the encoded data inputted via the second coupler based on a sampling frequency set to be two times higher than that of the encoded data and which outputs first sample data, a second sampling circuit which samples the encoded data at a timing earlier than that in the first sampling circuit and which outputs second sample data, a determination circuit which determines whether or not the first and the second sample data match each other, and a selection circuit which selects first phase data or second phase data from the first sample data.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: June 18, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Toshiyuki Yamagishi, Tomoya Horiguchi
  • Publication number: 20190116072
    Abstract: A semiconductor device of an embodiment includes first and second couplers, an encoding circuit, and a demodulating circuit. The encoding circuit executes differential Manchester encoding on digital data based on a clock inputted thereto via the first coupler and outputs an encoded data. The demodulating circuit includes a first sampling circuit which samples the encoded data inputted via the second coupler based on a sampling frequency set to be two times higher than that of the encoded data and which outputs first sample data, a second sampling circuit which samples the encoded data at a timing earlier than that in the first sampling circuit and which outputs second sample data, a determination circuit which determines whether or not the first and the second sample data match each other, and a selection circuit which selects first phase data or second phase data from the first sample data.
    Type: Application
    Filed: December 17, 2018
    Publication date: April 18, 2019
    Inventors: Toshiyuki Yamagishi, Tomoya Horiguchi
  • Patent number: 10193717
    Abstract: A semiconductor device of an embodiment includes first and second couplers, an encoding circuit, and a demodulating circuit. The encoding circuit executes differential Manchester encoding on digital data based on a clock inputted thereto via the first coupler and outputs an encoded data. The demodulating circuit includes a first sampling circuit which samples the encoded data inputted via the second coupler based on a sampling frequency set to be two times higher than that of the encoded data and which outputs first sample data, a second sampling circuit which samples the encoded data at a timing earlier than that in the first sampling circuit and which outputs second sample data, a determination circuit which determines whether or not the first and the second sample data match each other, and a selection circuit which selects first phase data or second phase data from the first sample data.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: January 29, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Toshiyuki Yamagishi, Tomoya Horiguchi
  • Publication number: 20180278446
    Abstract: A semiconductor device of an embodiment includes first and second couplers, an encoding circuit, and a demodulating circuit. The encoding circuit executes differential Manchester encoding on digital data based on a clock inputted thereto via the first coupler and outputs an encoded data. The demodulating circuit includes a first sampling circuit which samples the encoded data inputted via the second coupler based on a sampling frequency set to be two times higher than that of the encoded data and which outputs first sample data, a second sampling circuit which samples the encoded data at a timing earlier than that in the first sampling circuit and which outputs second sample data, a determination circuit which determines whether or not the first and the second sample data match each other, and a selection circuit which selects first phase data or second phase data from the first sample data.
    Type: Application
    Filed: January 5, 2018
    Publication date: September 27, 2018
    Inventors: Toshiyuki Yamagishi, Tomoya Horiguchi
  • Patent number: 10069670
    Abstract: A transmission and reception circuit includes a transmission circuit, a reception circuit, and a signal feedback path. The transmission path includes an output section, a signal generating circuit generating an in-phase component signal and an orthogonal component signal, and a transmission analog baseband circuit configured to perform digital to analog conversion of the generated in-phase component signal and orthogonal component signal. The reception circuit includes an input section, a reception analog baseband circuit performing analog to digital conversion of the transmitted in-phase component signal and orthogonal component signal, and a signal detection circuit that detects the analog-to-digital converted in-phase component signal and orthogonal component signal converted by the reception analog baseband circuit.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: September 4, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigehito Saigusa, Yousuke Hagiwara, Toshiyuki Yamagishi, Hiroshi Yoshida, Ichiro Seto
  • Patent number: 9954627
    Abstract: A quadrature demodulator includes a quadrature demodulating circuit configured to generate an analog in-phase signal and an analog quadrature signal based on an output signal of a low noise amplifier, and a controller configured to cause a thermal noise, instead of the output signal of the low noise amplifier, to be input to the quadrature demodulating circuit, when a correction parameter to correct a mismatch between the in-phase and quadrature signals is being calibrated.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: April 24, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yousuke Hagiwara, Toshiyuki Yamagishi, Toshiya Mitomo
  • Publication number: 20180083823
    Abstract: A transmission and reception circuit includes a transmission circuit, a reception circuit, and a signal feedback path. The transmission path includes an output section, a signal generating circuit generating an in-phase component signal and an orthogonal component signal, and a transmission analog baseband circuit configured to perform digital to analog conversion of the generated in-phase component signal and orthogonal component signal. The reception circuit includes an input section, a reception analog baseband circuit performing analog to digital conversion of the transmitted in-phase component signal and orthogonal component signal, and a signal detection circuit that detects the analog-to-digital converted in-phase component signal and orthogonal component signal converted by the reception analog baseband circuit.
    Type: Application
    Filed: March 1, 2017
    Publication date: March 22, 2018
    Inventors: Shigehito SAIGUSA, Yousuke HAGIWARA, Toshiyuki YAMAGISHI, Hiroshi YOSHIDA, Ichiro SETO
  • Publication number: 20170070299
    Abstract: A quadrature demodulator includes a quadrature demodulating circuit configured to generate an analog in-phase signal and an analog quadrature signal based on an output signal of a low noise amplifier, and a controller configured to cause a thermal noise, instead of the output signal of the low noise amplifier, to be input to the quadrature demodulating circuit, when a correction parameter to correct a mismatch between the in-phase and quadrature signals is being calibrated.
    Type: Application
    Filed: July 18, 2016
    Publication date: March 9, 2017
    Inventors: Yousuke HAGIWARA, Toshiyuki YAMAGISHI, Toshiya MITOMO
  • Patent number: 9281723
    Abstract: A rotary electric machine includes a stator; and a rotor including an iron core, which has a tubular connecting portion surrounding a shaft and 10 magnetic pole portions integrally formed with the connecting portion corresponding to a pole number, and a plurality of permanent magnets arranged between the magnetic pole portions. The iron core includes axially-penetrated magnet accommodating air gaps formed between the magnetic pole portions at the radial outer side of the connecting portion, and the permanent magnets are installed in the respective magnet accommodating air gaps such that a radial outer surface of each of the permanent magnets makes close contact with an inner surface of each of the magnet accommodating air gaps and such that a gap exists between a radial inner surface of each of the permanent magnets and the connecting portion.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: March 8, 2016
    Assignee: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Kenji Watanabe, Toshiyuki Yamagishi, Takashi Nomiyama, Naotake Yoshizawa
  • Patent number: 9203514
    Abstract: According to one embodiment, a transmission system includes a transmitter and a receiver. The transmitter includes a modulator configured to modulate transmission data at a chip rate to generate a modulation signal, and one or a plurality of light sources configured to emit visible light according to the modulation signal. The receiver includes a light receiver having one or more lines of light receiving elements to receive light in a first range including the visible light; and a demodulator configured to demodulate image data generated according to the light received by the light receiver to generate reception data corresponding to the transmission data. A following equation is satisfied ff<fm where fm is the chip rate, and ff is a frame rate of the light receiver.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: December 1, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jun Deguchi, Hideaki Majima, Toshiyuki Yamagishi, Nau Ozaki, Ichiro Seto, Koji Horisaki, Masahiro Sekiya, Hideki Yamada, Yuki Fujimura
  • Patent number: 9166457
    Abstract: The disclosure discloses a rotating electrical machine that is integrally formed with a reduction device having an input shaft to which a roller gear cam is provided and an output shaft to which cam followers configured to sequentially engage with the roller gear cam is provided on an outer periphery, extending along a direction orthogonal to the input shaft, and is configured to employ one of a field system or an armature as a rotator and the other of the field system or the armature as a stator, including a rotating shaft that is fixed to the rotator and integrally formed as a single shaft with the input shaft of the reduction device.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: October 20, 2015
    Assignees: KABUSHIKI KAISHA YASKAWA DENKI, SANKYO SEISAKUSHO CO.
    Inventors: Toshiyuki Yamagishi, Nobukazu Miyauchi, Kenji Matsuura, Toshinao Kato, Atsushi Oishi, Toshiki Takahashi
  • Publication number: 20150288239
    Abstract: A bobbin is mountable to a stator iron core of a rotating electrical machine, and includes a body and a protrusion. Around the body, a coil wire is to be wound. The body has an opening side end. The protrusion protrudes from the opening side end of the body in a direction approximately parallel to a coil axial direction. A terminal of the coil wire is to be wound around the protrusion.
    Type: Application
    Filed: April 7, 2015
    Publication date: October 8, 2015
    Applicant: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Toyofumi YUDA, Toshiyuki YAMAGISHI
  • Patent number: 9128146
    Abstract: According to one embodiment, there is provided a semiconductor integrated circuit including an on-chip measurement circuit. The measurement circuit includes a buffer line, a ring oscillator, a first measurement unit measuring a duty cycle of a periodic pulse output from the buffer line, and a second measurement unit measuring a frequency of a periodic pulse output from the ring oscillator. The buffer line including a plurality of delay elements connected in series. Each of the plurality of delay elements includes a former-stage inverter unit including a PMOS transistor and an NMOS transistor and having a first delay amount, and a latter-stage inverter unit including a PMOS transistor and an NMOS transistor and having a second delay amount different from the first delay amount.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: September 8, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshiyuki Yamagishi
  • Publication number: 20150137654
    Abstract: This disclosure discloses a rotating electric machine including a tubular frame and a stator core. The frame includes a bulged linear part on an inner peripheral surface. The bulged linear part has a shape extended linearly in an axial direction and bulged toward the inner periphery side. The stator core is fixed onto an inner periphery of the frame. The stator core includes a groove part fitted to the bulged linear part on an outer peripheral surface.
    Type: Application
    Filed: January 30, 2015
    Publication date: May 21, 2015
    Applicant: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Toshiyuki YAMAGISHI, Kenichi AOKI, Takenori OKA, Mitsuru IWAKIRI
  • Patent number: 9006945
    Abstract: This disclosure discloses a rotating electrical machine that is integrally formed with a reduction device having an input shaft and an output shaft and employs one of a field system and an armature as a rotor and the other of the field system and the armature as a stator, including a rotating shaft to which the rotor is fixed and that is coaxially connected to the input shaft of the reduction device, and a bearing support member configured to support bearings that rotatably support the input shaft of the reduction device, wherein the stator is provided to the bearing support member.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: April 14, 2015
    Assignee: Kabushiki Kaisha Yaskawa Denki
    Inventors: Nobukazu Miyauchi, Toshiyuki Yamagishi
  • Patent number: 8956046
    Abstract: A bag with a port member according to the present invention includes a bag having an opening and a port member attached to the opening. In addition, the port member has a tubular insertion portion and a bag side connection portion that is connected to a container side connection portion of other container, and the bag is positioned on the innermost circumferential face side of the bag with a port member on an inner face of the insertion portion. According to the bag with a port member, the bag with a port member that can reduce a residual amount of contents to be as small as possible when the contents inside the bag are taken out can be provided.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: February 17, 2015
    Assignees: Hosokawa Yoko Co., Ltd., JGC Corporation
    Inventors: Kazuhiro Umenaka, Takeshi Kojima, Naomi Hashimoto, Toshiyuki Yamagishi, Kanehide Oota