Abstract: A semiconductor device including a metal base; a first ceramic frame bonded to the metal base; a metallization layer for I/O terminals disposed on the first ceramic frame; a second ceramic frame larger than the first ceramic frame and bonded to the first ceramic frame and to the metallization layer; a metal disposed on and covering inner side walls of the first and second ceramic frames, not electrically contacting the metallization layer but electrically contacting the base member; a semiconductor element disposed on the base member within the first ceramic frame, having I/O terminals connected to the metallization layer, and having a grounding terminal connected to the base member; and a cover hermetically sealing the semiconductor element, bonded to the second ceramic frame, and electrically connected to the metal disposed on the inner side walls.

Abstract: A semiconductor package includes a package body, a semiconductor chip disposed on the surface of the package body, external lead terminals disposed on two opposite side surfaces of the package body, a lid hermetically sealing and shielding the semiconductor chip in the package body, a package substrate having a metallized region on which the package body is mounted, and a metal layer disposed on the rear surface of the package body and connected to the metallized region of the package substrate with solder. The metal layer includes material having a good adhesion to the solder and has a pattern in which stripe-shaped metal portions abut two opposite side surfaces of the package body where the external lead terminals are absent, and stripe-shaped openings that abut the respective metal portions. Therefore, when the package body is soldered to the package substrate, unwanted flow of the melted solder is stopped at the openings in the metal layer.