Patents by Inventor Tosiyuki Ohkuma

Tosiyuki Ohkuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5159571
    Abstract: A static random access memory (RAM) includes a data set circuit (DSC) coupled to pairs of load elements of memory cells to test the connection between a pair of load elements and a pair of memory nodes of each of the memory cells. The data set circuit responds to predetermined control signals and data to be set to the memory cells and supplies the predetermined voltage corresponding to such data to the pair of load elements. If the pair of load elements and the memory nodes of a memory cell are properly coupled, data of the memory cell will be inverted. Therefore, if the data of a memory cell is not inverted during the test, it can be quickly determined that a disconnection fault exists at that memory cell location.
    Type: Grant
    Filed: May 9, 1991
    Date of Patent: October 27, 1992
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Akira Ito, Yoichi Sato, Tosiyuki Ohkuma