Patents by Inventor Touru Inoue

Touru Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5420873
    Abstract: An apparatus for decoding a received BCH code signal for correcting a combined complex error is disclosed which includes a syndrome generating circuit for generating two n-bit syndromes corresponding to the received signal, a syndrome converting circuit for converting the two n-bit syndromes to a 2n-bit syndrome, a random error correcting circuit, a burst error correcting circuit, two combining circuits and output selecting circuit. The random error correcting circuit inputs the two n-bit syndromes and outputs a random error correction signal to one of the combining circuits and the burst error correcting circuit inputs the 2n-bit syndrome and outputs a burst error correction signal to the other of the combining circuits. The combining circuits combine the correction signals to the received BCH code signal.
    Type: Grant
    Filed: April 6, 1992
    Date of Patent: May 30, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Atsuhiro Yamagishi, Touru Inoue, Tokumichi Murakami, Kohtaro Asai
  • Patent number: 5179560
    Abstract: An apparatus for decoding a received BCH code signal for correcting a combined complex error is disclosed which includes a syndrome generating circuit for generating two n-bit syndromes corresponding to the received signal, a syndrome converting circuit for converting the two n-bit syndromes to a 2n-bit syndrome, a random error correcting circuit, a burst error correcting circuit, two combining circuits and output selecting circuit. The random error correcting circuit receives input as the two n-bit syndromes and outputs a random error correction signal to one of the combining circuits and the burst error correcting circuit receives as input the 2n-bit syndrome and outputs a burst error correction signal to the other of the combining circuits. The combining circuits combine the correction signals with the received BCH code signal.
    Type: Grant
    Filed: December 4, 1989
    Date of Patent: January 12, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Atsuhiro Yamagishi, Touru Inoue, Tokumichi Murakami, Kohtaro Asai