Patents by Inventor Touru Sumiya

Touru Sumiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9190145
    Abstract: In a drive method for a memory element that includes an insulating substrate, a first electrode and a second electrode provided on the insulating substrate, and an inter-electrode gap portion provided between the first electrode and the second electrode and having a gap of the order of nanometers where a phenomenon of a change in resistance value between the first and second electrodes occurs, and that can perform a transition from a predetermined low-resistance state to a predetermined high-resistance state and a transition from the high-resistance state to the low-resistance state, a current pulse is applied to the memory element by a constant current circuit upon the transition from the high-resistance state to the low-resistance state.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: November 17, 2015
    Assignees: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Patent number: 9135990
    Abstract: A memory element includes an insulating substrate; a first electrode and a second electrode on the insulating substrate; and an inter-electrode gap portion that causes a change in resistance value between the first and second electrodes. Applied to the memory element from a pulse generating source is a first voltage pulse for shifting from a predetermined low-resistance state to a predetermined high-resistance state, and a second voltage pulse for shifting from the high-resistance state to the low-resistance state through a series-connected resistor, by which current flowing to the memory element after the change to a low resistance value is reduced. When shifting from the high to the low-resistance state, a voltage pulse is applied such that an electrical resistance between the pulse generating source and the memory element becomes higher than the electrical resistance shifting from the low to the high-resistance state.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: September 15, 2015
    Assignees: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Patent number: 9130159
    Abstract: Disclosed is a fabrication method of an element with nanogap electrodes including a first electrode, a second electrode provided above the first electrode, and a gap provided between the first electrode and the second electrode, the gap being in an order of nanometer to allow resistive state to be switched by applying a predetermined voltage between the first electrode and the second electrode, the method comprising: forming the first electrode; forming a spacer on an upper surface of the first electrode; forming the second electrode in contact with an upper surface of the spacer; and removing the spacer to form the gap.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: September 8, 2015
    Assignee: Funai Electric Co., Ltd.
    Inventors: Shigeo Furuta, Touru Sumiya, Yuichiro Masuda, Tsuyoshi Takahashi, Yutaka Hayashi, Masatoshi Ono
  • Publication number: 20150146346
    Abstract: A lithium ion capacitor includes a positive electrode, a negative electrode, and an electrolyte. The positive electrode comprises a conductive polymer and an oxidation-reduction material having a lower oxidation-reduction potential than the conductive polymer as a positive electrode active material.
    Type: Application
    Filed: November 18, 2014
    Publication date: May 28, 2015
    Inventors: Takeshi Shimomura, Touru Sumiya, Masao Suzuki, Masatoshi Ono
  • Publication number: 20150138694
    Abstract: A method for manufacturing an electrode for use in an electrical storage device includes bringing a porous material into contact with an oxidizing agent, then bringing the porous material into contact with a polymerizable monomer, so that the porous material is modified with an electrically-conductive polymer formed by a polymerization reaction of the polymerizable monomer and the oxidizing agent, and forming, on a surface of a collector, an active material layer containing the porous material modified with the electrically-conductive polymer.
    Type: Application
    Filed: October 24, 2014
    Publication date: May 21, 2015
    Inventors: Takeshi SHIMOMURA, Touru SUMIYA, Masao SUZUKI, Masatoshi ONO
  • Publication number: 20150115896
    Abstract: A power storage device includes a positive electrode, a negative electrode, and a non-aqueous electrolyte. The negative electrode comprises a plurality of types of negative electrode active materials, wherein each of the plurality of types has different lithium-ion absorption potentials.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 30, 2015
    Inventors: Takeshi Shimomura, Touru Sumiya, Shigeki Kihara, Masao Suzuki, Masatoshi Ono
  • Publication number: 20140293509
    Abstract: An electric double layer capacitor electrode includes a positive electrode having a positive electrode active material layer including a positive electrode side porous body and a negative electrode having a negative electrode active material layer including a negative electrode side porous body. An oxidation-reduction substance causing an oxidation-reduction reaction during charging and discharging is adsorbed onto at least one of the positive electrode side porous body of the positive electrode active material layer and the negative electrode side porous body of the negative electrode active material layer.
    Type: Application
    Filed: March 25, 2014
    Publication date: October 2, 2014
    Applicant: Funai Electric Co., Ltd.
    Inventors: Takeshi SHIMOMURA, Touru SUMIYA, Masao SUZUKI, Shigeki KIHARA, Masatoshi ONO
  • Publication number: 20130170285
    Abstract: In a drive method for a memory element that includes an insulating substrate, a first electrode and a second electrode provided on the insulating substrate, and an inter-electrode gap portion provided between the first electrode and the second electrode and having a gap of the order of nanometers where a phenomenon of a change in resistance value between the first and second electrodes occurs, and that can perform a transition from a predetermined low-resistance state to a predetermined high-resistance state and a transition from the high-resistance state to the low-resistance state, a current pulse is applied to the memory element by a constant current circuit upon the transition from the high-resistance state to the low-resistance state.
    Type: Application
    Filed: August 25, 2011
    Publication date: July 4, 2013
    Applicants: National Institute of Advance Industrial Science and Technology, Funai Electric Co., Ltd., Funai Electric Advanced Applied Technology Research Institute Inc.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Publication number: 20130155757
    Abstract: A memory element includes an insulating substrate; a first electrode and a second electrode on the insulating substrate; and an inter-electrode gap portion that causes a change in resistance value between the first and second electrodes. Applied to the memory element from a pulse generating source is a first voltage pulse for shifting from a predetermined low-resistance state to a predetermined high-resistance state, and a second voltage pulse for shifting from the high-resistance state to the low-resistance state through a series-connected resistor, by which current flowing to the memory element after the change to a low resistance value is reduced. When shifting from the high to the low-resistance state, a voltage pulse is applied such that an electrical resistance between the pulse generating source and the memory element becomes higher than the electrical resistance shifting from the low to the high-resistance state.
    Type: Application
    Filed: August 25, 2011
    Publication date: June 20, 2013
    Applicants: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd., Funai Electric Advanced Applied Technology Research Institute Inc.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Publication number: 20100257726
    Abstract: Disclosed is a fabrication method of an element with nanogap electrodes including a first electrode, a second electrode provided above the first electrode, and a gap provided between the first electrode and the second electrode, the gap being in an order of nanometer to allow resistive state to be switched by applying a predetermined voltage between the first electrode and the second electrode, the method comprising: forming the first electrode; forming a spacer on an upper surface of the first electrode; forming the second electrode in contact with an upper surface of the spacer; and removing the spacer to form the gap.
    Type: Application
    Filed: April 8, 2010
    Publication date: October 14, 2010
    Applicants: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.
    Inventors: Shigeo FURUTA, Touru Sumiya, Yuichiro Masuda, Tsuyoshi Takahashi, Yutaka Hayashi, Masatoshi Ono
  • Publication number: 20100175991
    Abstract: An enzyme electrode having excellent sensitivity, excellent stability, and a longer operating life, and an enzyme sensor using the enzyme electrode are provided. The enzyme electrode includes an electrode 2, a mesoporous silica material 3 formed on the electrode 2, and enzyme 4 immobilized in a small cavity of the mesoporous silica material 3. The size of the small cavity of the mesoporous silica material 3 is set to be 0.5 to 2.0 times the size of the enzyme 4.
    Type: Application
    Filed: June 13, 2008
    Publication date: July 15, 2010
    Applicants: Funai Electric Advanced Applied Technology Research Institute Inc., National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.
    Inventors: Takeshi Shimomura, Touru Sumiya, Yuichiro Masuda, Masatoshi Ono, Tetsuji Itoh, Fujio Mizukami
  • Publication number: 20090008248
    Abstract: Disclosed is an enzyme electrode comprising: an electrode; a carbon nanotube layer including a plurality of carbon nanotubes extending directly from the electrode and/or a metallic catalyst immobilized on the electrode; and an enzyme immobilized in the carbon nanotube layer by being sandwiched between the carbon nanotubes.
    Type: Application
    Filed: July 3, 2008
    Publication date: January 8, 2009
    Applicants: Funai Electric Advanced Applied Technology Research Institute Inc., Funai Electric Co., Ltd.
    Inventors: Takeshi SHIMOMURA, Touru Sumiya, Yuichiro Masuda, Masatoshi Ono
  • Patent number: 7300712
    Abstract: In a magnetic sensor (1) including a substrate (10) having a magnetism-sensitive element (11) formed thereon, a hard membrane (14) is formed on the outermost surface, an organic film (13) to relieve the stress caused by the hard membrane (14) is formed under the hard membrane (14), and an inorganic film (12) to relieve the stress caused by the organic film (13) is formed between the organic film (13) and magnetism-sensitive element (11). Also, an intermediate film formed from an element having a large force of bonding to carbon may be formed between the organic film (13) and hard membrane (14). Thus, the magnetic sensor (MR sensor, for example) can be protected against an external shock.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: November 27, 2007
    Assignee: Sony Manufacturing Systems Corporation
    Inventors: Masaaki Kusumi, Mitsuru Ohno, Michio Okano, Hideki Nakamori, Touru Sumiya, Akitaka Tsunogae, Tomoyuki Nakada, Teruyuki Miura, Yoshihiko Ohkawara
  • Publication number: 20040157067
    Abstract: In a magnetic sensor (1) including a substrate (10) having a magnetism-sensitive element (11) formed thereon, a hard membrane (14) is formed on the outermost surface, an organic film (13) to relieve the stress caused by the hard membrane (14) is formed under the hard membrane (14), and an inorganic film (12) to relieve the stress caused by the organic film (13) is formed between the organic film (13) and magnetism-sensitive element (11). Also, an intermediate film formed from an element having a large force of bonding to carbon may be formed between the organic film (13) and hard membrane (14). Thus, the magnetic sensor (MR sensor, for example) can be protected against an external shock.
    Type: Application
    Filed: October 20, 2003
    Publication date: August 12, 2004
    Applicant: Sony Precision Technology Inc.
    Inventors: Masaaki Kusumi, Mitsuru Ohno, Michio Okano, Hideki Nakamori, Touru Sumiya, Akitaka Tsunogae, Tomoyuki Nakada, Teruyuki Miura, Yoshihiko Ohkawara
  • Patent number: 6452244
    Abstract: On a semiconductor layer 1 consisting of a substrate of a semiconductor single crystal or the like, a metallic layer 2 of a thickness of 20 nm or less is formed. The metallic layer 2 comprises a first area A directly contacting with the semiconductor layer 1, and a second area B that is interposed by an intermediate layer 3 consisting of an insulator, a metal different from the metallic layer 2 or a semiconductor different from the semiconductor layer 1 between the semiconductor 1 and the metallic layer 2, and of a thickness of 10 nm or less. The first area and the second area are different in their Schottky currents, further in their Schottky barrier heights. Any one of the respective areas A and B has an area of nanometer level, and the respective interfaces in each of the areas A and B have an essentially uniform potential barrier, respectively. Such a film-like composite structure contributes to a minute semiconductor device of nanometer level and realization of a new functional device.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: September 17, 2002
    Assignees: Japan Science and Technology Corporation, Kabushiki Kaisha Toshiba
    Inventors: Tadao Miura, Touru Sumiya, Shun-ichiro Tanaka