Patents by Inventor Toyoji Chino

Toyoji Chino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6810059
    Abstract: A semiconductor laser includes an active layer stripe including a first semiconductor layer, an active layer, and a second semiconductor layer that are laminated in that order on a substrate and formed into a stripe-shape; a burying layer in which the active layer stripe is buried; and a contact layer formed on the burying layer. The semiconductor laser further includes a monitor stripe that is formed in parallel to the active layer stripe and is composed of the first semiconductor layer only at an output end of the laser, the monitor stripe is buried in the burying layer on which the contact layer is formed, and the active layer stripe and the monitor stripe are isolated electrically by an isolation groove. The width of the active layer stripe can be controlled easily based on the width of the active layer in the monitor stripe as a criterion.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: October 26, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Toyoji Chino
  • Patent number: 6674779
    Abstract: A semiconductor laser device includes a substrate, a light emission region provided on the substrate, and an alignment stripe provided on the substrate so as to be adjacent to the light emission region. The light emission region includes a first active layer stripe having a layered structure including a first waveguide layer, an active layer, and a second waveguide layer, a first buried layer formed so as to cover side faces of the active layer stripe, a second buried layer formed on the first buried layer, and a third buried layer formed on the second buried layer and the active layer stripe. The alignment stripe includes a second active layer stripe having a layered structure including the first waveguide layer, the active layer, and the second waveguide layer, and a selective growth mask formed on the second active layer stripe and formed of a material on which the first buried layer, the second buried layer and the third buried layer are incapable of growing.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: January 6, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Toyoji Chino
  • Patent number: 6613679
    Abstract: A method for fabricating a semiconductor device of the present invention comprises the steps of: a) depositing a masking film on a first compound semiconductor layer formed on a semiconductor substrate; b) patterning the masking film so that the film has an opening; c) etching away at least an uppermost part of the first semiconductor layer, which part is located inside the opening and includes a degraded layer formed in the step a) or b), using a first etchant and the masking film; and d) patterning the first semiconductor layer by etching away another part of the first layer using a second etchant and the masking film. That another part is located inside the opening and does not include the uppermost part with the degraded layer. The second etchant allows for etching the first layer at a rate lower than a rate realized by the first etchant.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: September 2, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Toyoji Chino
  • Publication number: 20020172249
    Abstract: A semiconductor laser includes an active layer stripe including a first semiconductor layer, an active layer, and a second semiconductor layer that are laminated in that order on a substrate and formed into a stripe-shape; a burying layer in which the active layer stripe is buried; and a contact layer formed on the burying layer. The semiconductor laser further includes a monitor stripe that is formed in parallel to the active layer stripe and is composed of the first semiconductor layer only at an output end of the laser, the monitor stripe is buried in the burying layer on which the contact layer is formed, and the active layer stripe and the monitor stripe are isolated electrically by an isolation groove. The width of the active layer stripe can be controlled easily based on the width of the active layer in the monitor stripe as a criterion.
    Type: Application
    Filed: May 14, 2002
    Publication date: November 21, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Toyoji Chino
  • Patent number: 6449298
    Abstract: A striped region with a convex cross section is formed as a laser resonant cavity on an n-type InP substrate. The lower part of the striped region includes an n-type InP cladding layer and an n-type InGaAsP first waveguide layer, which are stacked in this order on the substrate. The upper part of the striped region includes an InGaAsP active layer, a p-type InGaAsP second waveguide layer and a p-type InP cladding layer, which are stacked in this order on the first waveguide layer. The striped region extends along the zone axis, or in the [011] direction. The sides of the upper striped region have a crystallographic plane orientation (0-11), while the sides of the lower striped region have a crystallographic plane orientation (1-11)B.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: September 10, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Toshiyuki Tarizawa
  • Patent number: 6423561
    Abstract: A method for fabricating a semiconductor device, in which a semiconductor chip having a first surface and a second surface substantially parallel to each other is mounted on a submount such that the first surface faces the submount, includes: a first step of applying resin to at least one of the semiconductor chip and the submount; a second step of applying a pressure to the semiconductor chip and the submount so that the semiconductor chip and the submount are bonded to each other by the resin, resulting in electrical connection therebetween; and a third step of performing at least one of a film formation process, an etching process, a patterning process, and a washing process for the second surface of the semiconductor chip.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: July 23, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Takayuki Yoshida, Kenichi Matsuda
  • Publication number: 20020009894
    Abstract: A method for fabricating a semiconductor device of the present invention comprises the steps of: a) depositing a masking film on a first compound semiconductor layer formed on a semiconductor substrate; b) patterning the masking film so that the film has an opening; c) etching away at least an uppermost part of the first semiconductor layer, which part is located inside the opening and includes a degraded layer formed in the step a) or b), using a first etchant and the masking film; and d) patterning the first semiconductor layer by etching away another part of the first layer using a second etchant and the masking film. That another part is located inside the opening and does not include the uppermost part with the degraded layer. The second etchant allows for etching the first layer at a rate lower than a rate realized by the first etchant.
    Type: Application
    Filed: December 21, 2000
    Publication date: January 24, 2002
    Inventor: Toyoji Chino
  • Publication number: 20020001326
    Abstract: A semiconductor laser device includes a substrate, a light emission region provided on the substrate, and an alignment stripe provided on the substrate so as to be adjacent to the light emission region. The light emission region includes a first active layer stripe having a layered structure including a first waveguide layer, an active layer, and a second waveguide layer, a first buried layer formed so as to cover side faces of the active layer stripe, a second buried layer formed on the first buried layer, and a third buried layer formed on the second buried layer and the active layer stripe. The alignment stripe includes a second active layer stripe having a layered structure including the first waveguide layer, the active layer, and the second waveguide layer, and a selective growth mask formed on the second active layer stripe and formed of a material on which the first buried layer, the second buried layer and the third buried layer are incapable of growing.
    Type: Application
    Filed: March 13, 2001
    Publication date: January 3, 2002
    Inventor: Toyoji Chino
  • Patent number: 6266354
    Abstract: A semiconductor laser device, including a substrate; a ridge stripe formed on the substrate and including an active layer, an n-cladding layer and p-cladding layer, the n-cladding layer and the p-cladding layer interposing the active layer; in which the ridge stripe has a laser unit which lases. In one embodiment the ridge stripe has a tip portion having a tapered shape, and an angle formed inside the ridge stripe by a bottom surface of the ridge stripe and a side surface of the ridge stripe is in the range of about 60° and about 90°. In one embodiment, the laser device includes a misoriented substrate and the ridge stripe has current blocking layers formed on both sides thereof.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: July 24, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Yasuhito Kumabuchi, Isao Kidoguchi, Hideto Adachi
  • Patent number: 6184066
    Abstract: A method for fabricating a semiconductor device, in which a semiconductor chip having a first surface and a second surface substantially parallel to each other is mounted on a submount such that the first surface faces the submount, includes: a first step of applying resin to at least one of the semiconductor chip and the submount; a second step of applying a pressure to the semiconductor chip and the submount so that the semiconductor chip and the submount are bonded to each other by the resin, resulting in electrical connection therebetween; and a third step of performing at least one of a film formation process, an etching process, a patterning process, and a washing process for the second surface of the semiconductor chip.
    Type: Grant
    Filed: May 27, 1998
    Date of Patent: February 6, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Takayuki Yoshida, Kenichi Matsuda
  • Patent number: 6127201
    Abstract: An etching method for performing dry-etching on a III-V group compound semiconductor or a II-VI group compound semiconductor in a dry-etching apparatus comprising a plasma source for creating a plasma of density of about 10.sup.10 cm.sup.-3 or greater, using a mixed gas containing a gas including a halogen element and a gas including nitrogen. The etching conditions are as follows: (a flow rate of the gas containing said halogen gas)/(a flow rate of said nitrogen gas).gtoreq.1; and an internal pressure during etching reaction is about 1 mTorr or greater.
    Type: Grant
    Filed: March 16, 1999
    Date of Patent: October 3, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Yasuhito Kumabuchi, Isao Kidoguchi, Hideto Adachi
  • Patent number: 5968845
    Abstract: An etching method for performing dry-etching on a III-V group compound semiconductor or a II-VI group compound semiconductor in a dry-etching apparatus comprising a plasma source for creating a plasma of density of about 10.sup.10 cm.sup.-3 or greater, using a mixed gas containing a gas including a halogen element and a gas including nitrogon. The etching conditions are as follows: (a flow rate of the gas containing said halogen gas)/(a flow rate of said nitrogen gas) .gtoreq.1; and an internal pressure during etching reaction is about 1 mTorr or greater.
    Type: Grant
    Filed: February 7, 1997
    Date of Patent: October 19, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Yasuhito Kumabuchi, Isao Kidoguchi, Hideto Adachi
  • Patent number: 5796714
    Abstract: The optical module of the invention includes: a first substrate; a vertical-cavity surface-emitting laser including an upper surface, a bottom surface and a semiconductor multi-layered structure including at least a light-emitting layer, the vertical-cavity surface-emitting laser being supported on the first substrate; an electrode structure electrically connected with the bottom surface of the vertical-cavity surface-emitting laser, the electrode structure being supported on the first substrate; and a second substrate including a first bump and a second bump. In the optical module, an upper surface of the electrode structure and the upper surface of the vertical-cavity surface-emitting laser jut out from the first substrate. The second substrate is positioned with respect to the first substrate so that the first bump and the second bump come into contact with an upper surface of the electrode structure and the upper surface of the vertical-cavity surface-emitting laser, respectively.
    Type: Grant
    Filed: September 25, 1995
    Date of Patent: August 18, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Kenichi Matsuda, Takayuki Yoshida, Kenzo Hatada
  • Patent number: 5513202
    Abstract: A vertical-cavity surface-emitting semiconductor laser includes: a p-type bottom mirror having an upper face; a p-type spacer layer covering over the entire upper face of the p-type bottom mirror; an active region including an active layer having a bottom face smaller than the upper face of the p-type bottom mirror, the active region being formed on the p-type spacer layer; an n-type spacer layer formed on the active region; and an n-type top mirror formed on the n-type spacer layer, wherein a sum d of optical path lengths of the p-type spacer layer, the active region and the n-type spacer layer in a perpendicular direction satisfies a relationship expressed by d=(1+n).cndot..lambda./2 (n: natural number) with respect to a wavelength .lambda. of light oscillated from the active region.
    Type: Grant
    Filed: February 23, 1995
    Date of Patent: April 30, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Kobayashi, Toyoji Chino, Kenichi Matsuda
  • Patent number: 5416044
    Abstract: A method for producing a surface-emitting laser, includes the steps of: forming a mask pattern to define a top mirror on a semiconductor substrate, the semiconductor substrate having a first semiconductor multilayer formed on the semiconductor substrate, a second semiconductor multilayer formed on the first semiconductor multilayer, and a third semiconductor multilayer formed on the second semiconductor multilayer, the first semiconductor multilayer constituting a bottom mirror, the second semiconductor layer including an upper barrier layer and a lower barrier layer, and an active layer sandwiched between the upper and lower barrier layers, the third semiconductor multilayer constituting a top mirror; forming the top mirror by partially removing the third semiconductor layer by dry etching using the mask pattern as a mask until the surface of the upper barrier layer of the second semiconductor multilayer is exposed; forming an etching protective film at least on the side of the top mirror; partially removing
    Type: Grant
    Filed: March 11, 1994
    Date of Patent: May 16, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Kenichi Matsuda
  • Patent number: 5321294
    Abstract: A shift register according to the present invention includes: a plurality of first electrodes; at least one second electrode; a voltage application unit for applying a voltage to each of the plurality of first electrodes; a plurality of optically bistable elements connected to each of the plurality of first electrodes and at least one second electrode; and an optical waveguide layer for optically coupling the plurality of optically bistable elements to each other.
    Type: Grant
    Filed: June 24, 1993
    Date of Patent: June 14, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Kenichi Matsuda
  • Patent number: 5308440
    Abstract: A semiconductor device with air-bridge interconnection comprises: a substrate; a plurality of mesas with distance therebetween smaller than a predetermined value; and a metal layer supported by the plurality of mesas, the metal layer having a narrow portion at the intermediate portion thereof and both ends having larger width than the narrow portion. The air-bridge interconnection is obtained by side-etching controlled during dry-etching using interconnection metal layer as an etching-mask to remove a mass of semiconductor material under the interconnection metal layer.
    Type: Grant
    Filed: September 2, 1992
    Date of Patent: May 3, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Kenichi Matsuda, Jun Shibata
  • Patent number: 5147827
    Abstract: A device such as a phototransistor, a photodiode, a laser diode or the like including a compound semiconductor coated with a stable passivation film to reduce leakage current is disclosed. The passivation film includes oxygen, a metallic element and constituent elements of the device, and the concentration of the elements included in the passivation film changes gradually through the interface between the passivation film and the device. Such a passivation film is formed by the oxidation or anodic oxidation of a device soaked in an aqueous solution of hydrogen oxide containing metallic ions such as Fe.sup.2+, Fe.sup.3+, Cu.sup.+, Cu.sup.2+, Co.sup.2+ or Cr.sup.2+ under the control of the temperature of the solution.
    Type: Grant
    Filed: June 6, 1991
    Date of Patent: September 15, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toyoji Chino, Kenichi Matsuda, Shibata Jun