Patents by Inventor Tracy Autry

Tracy Autry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8587107
    Abstract: A hermetically sealed integrated circuit package that includes a cavity housing a semiconductor die, whereby the cavity is pressurized during assembly and when formed. The invention prevents the stress on a package created when the package is subject to high temperatures at atmospheric pressure and then cooled from reducing the performance of the die at high voltages. By packaging a die at a high pressure, such as up to 50 PSIG, in an atmosphere with an inert gas, and providing a large pressure in the completed package, the dies are significantly less likely to arc at higher voltages, allowing the realization of single die packages operable up to at least 1200 volts. Moreover, the present invention is configured to employ brazed elements compatible with Silicon Carbide dies which can be processed at higher temperatures.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: November 19, 2013
    Assignee: Microsemi Corporation
    Inventor: Tracy Autry
  • Publication number: 20120326323
    Abstract: A hermetically sealed integrated circuit package that includes a cavity housing a semiconductor die, whereby the cavity is pressurized during assembly and when formed. The invention prevents the stress on a package created when the package is subject to high temperatures at atmospheric pressure and then cooled from reducing the performance of the die at high voltages. By packaging a die at a high pressure, such as up to 60 PSIG or more, in an atmosphere with an inert gas, and providing a large pressure in the completed package, the dies are significantly less likely to arc at higher voltages, allowing the realization of single die packages operable up to at least 1200 volts or more. Moreover, the present invention is configured to employ brazed elements compatible with Silicon Carbide dies which can be processed at higher temperatures.
    Type: Application
    Filed: September 5, 2012
    Publication date: December 27, 2012
    Applicant: MICROSEMI CORPORATION
    Inventor: Tracy Autry
  • Patent number: 8274164
    Abstract: A high power surface mount package including a thick bond line of solder interposed between the die and a heatsink, and between the die and a lead frame, wherein the lead frame has the same coefficient of thermal expansion as the heatsink. In one preferred embodiment, the heatsink and the lead frame are comprised of the same material. The package can be assembled using standard automated equipment, and does not require a weight or clip to force the parts close together, which force typically reduces the solder bond line thickness. Advantageously, the thermal stresses on each side of the die are effectively balanced, allowing for a large surface area die to be packaged with conventional and less expensive materials. One type of die that benefits from the present invention can include a transient voltage suppressor, but could include other dies generating a significant amount of heat, such as those in excess of 0.200 inches square.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: September 25, 2012
    Assignee: Microsemi Corporation
    Inventor: Tracy Autry
  • Patent number: 8237171
    Abstract: A hermetically sealed integrated circuit package that includes a cavity housing a semiconductor die, whereby the cavity is pressurized during assembly and when formed. The invention prevents the stress on a package created when the package is subject to high temperatures at atmospheric pressure and then cooled from reducing the performance of the die at high voltages. By packaging a die at a high pressure, such as up to 50 PSIG, in an atmosphere with an inert gas, and providing a large pressure in the completed package, the dies are significantly less likely to arc at higher voltages, allowing the realization of single die packages operable up to at least 1200 volts. Moreover, the present invention is configured to employ brazed elements compatible with Silicon Carbide dies which can be processed at higher temperatures.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: August 7, 2012
    Assignee: Microsemi Corporation
    Inventor: Tracy Autry
  • Patent number: 8058719
    Abstract: A microelectronic device including a microelectronic circuit and at least one planar flexible lead. These planar flexible leads are adapted to bend and flex during mechanical stress allow direct mounting of the device to a member, and withstand extreme thermal cycling, such as ?197° C. to +150° C. such as encountered in space.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: November 15, 2011
    Inventor: Tracy Autry
  • Patent number: 8018042
    Abstract: A microelectronic device including a microelectronic circuit and at least one planar flexible lead. These planar flexible leads are adapted to bend and flex during mechanical stress, allowing direct mounting of the device to a member and able withstand extreme thermal cycling between ?20° C. to +80° C. encountered in terrestrial applications. Advantageously, the microelectronic device is adapted to be both weldable and solderable. The invention may comprise a solar cell diode, which is flexible and so thin that it can be affixed directly to the solar panel proximate the solar cell.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: September 13, 2011
    Assignee: Microsemi Corporation
    Inventor: Tracy Autry
  • Patent number: 8003446
    Abstract: A single step packaging process that both melts a solder and also cures an adhesive about a microelectronic circuit. The process finds technical advantages by simplifying packaging of a die that may be coupled to a planar flexible lead, which leads to a lower production cost and quicker manufacturing time. The planar flexible lead may be adapted to bend and flex during mechanical stress and during extreme temperature cycling, and allow direct mounting of the device to a member by easily welding or soldering. The invention may comprise a flexible solar cell diode that can be closely positioned on solar panels at an extremely low cost.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: August 23, 2011
    Assignee: Microsemi Corporation
    Inventor: Tracy Autry
  • Publication number: 20110193097
    Abstract: A hermetically sealed integrated circuit package that includes a cavity housing a semiconductor die, whereby the cavity is pressurized during assembly and when formed. The invention prevents the stress on a package created when the package is subject to high temperatures at atmospheric pressure and then cooled from reducing the performance of the die at high voltages. By packaging a die at a high pressure, such as up to 50 PSIG, in an atmosphere with an inert gas, and providing a large pressure in the completed package, the dies are significantly less likely to arc at higher voltages, allowing the realization of single die packages operable up to at least 1200 volts. Moreover, the present invention is configured to employ brazed elements compatible with Silicon Carbide dies which can be processed at higher temperatures.
    Type: Application
    Filed: February 9, 2010
    Publication date: August 11, 2011
    Inventor: Tracy Autry
  • Publication number: 20110193098
    Abstract: A hermetically sealed integrated circuit package that includes a cavity housing a semiconductor die, whereby the cavity is pressurized during assembly and when formed. The invention prevents the stress on a package created when the package is subject to high temperatures at atmospheric pressure and then cooled from reducing the performance of the die at high voltages. By packaging a die at a high pressure, such as up to 50 PSIG, in an atmosphere with an inert gas, and providing a large pressure in the completed package, the dies are significantly less likely to arc at higher voltages, allowing the realization of single die packages operable up to at least 1200 volts. Moreover, the present invention is configured to employ brazed elements compatible with Silicon Carbide dies which can be processed at higher temperatures.
    Type: Application
    Filed: February 9, 2010
    Publication date: August 11, 2011
    Inventor: Tracy Autry
  • Patent number: 7741706
    Abstract: A low profile, 1 or 2 die design, surface mount high power microelectronic package with coefficient of expansion (CTE) matched materials such as Silicon die to Molybdenum conductor (bond pads). The CTE matching of the materials in the package enables the device to withstand repeated, extreme temperature range cycling without failing or cracking. The package can be used for transient voltage suppression (TVS), Schottky diode, rectifier diode, or high voltage diodes, among other uses. The use of a heat sink metal conductor that has a very high modulus of elasticity allows for a very thin wall plastic locking to be utilized in order to minimize the footprint of the package.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: June 22, 2010
    Assignee: Microsemi Corporation
    Inventors: Tracy Autry, Stephen G. Kelly, George A. Digiacomo, Christopher Alan Barnes
  • Publication number: 20100136748
    Abstract: A single step packaging process that both melts a solder and also cures an adhesive about a microelectronic circuit. The process finds technical advantages by simplifying packaging of a die that may be coupled to a planar flexible lead, which leads to a lower production cost and quicker manufacturing time. The planar flexible lead may be adapted to bend and flex during mechanical stress and during extreme temperature cycling, and allow direct mounting of the device to a member by easily welding or soldering. The invention may comprise a flexible solar cell diode that can be closely positioned on solar panels at an extremely low cost.
    Type: Application
    Filed: October 27, 2009
    Publication date: June 3, 2010
    Inventor: Tracy Autry
  • Publication number: 20100109147
    Abstract: A high power surface mount package including a thick bond line of solder interposed between the die and a heatsink, and between the die and a lead frame, wherein the lead frame has the same coefficient of thermal expansion as the heatsink. In one preferred embodiment, the heatsink and the lead frame are comprised of the same material. The package can be assembled using standard automated equipment, and does not require a weight or clip to force the parts close together, which force typically reduces the solder bond line thickness. Advantageously, the thermal stresses on each side of the die are effectively balanced, allowing for a large surface area die to be packaged with conventional and less expensive materials. One type of die that benefits from the present invention can include a transient voltage suppressor, but could include other dies generating a significant amount of heat, such as those in excess of 0.200 inches square.
    Type: Application
    Filed: November 6, 2009
    Publication date: May 6, 2010
    Inventor: Tracy Autry
  • Publication number: 20090134508
    Abstract: A microelectronic device including a microelectronic circuit and at least one planar flexible lead. These planar flexible leads are adapted to bend and flex during mechanical stress, allowing direct mounting of the device to a member and able withstand extreme thermal cycling between ?20° C. to +80° C. encountered in terrestrial applications. Advantageously, the microelectronic device is adapted to be both weldable and solderable. The invention may comprise a solar cell diode, which is flexible and so thin that it can be affixed directly to the solar panel proximate the solar cell.
    Type: Application
    Filed: December 5, 2008
    Publication date: May 28, 2009
    Inventor: Tracy Autry
  • Patent number: 7435993
    Abstract: An electronic package designed to package silicon carbide discrete components for silicon carbide chips. The electronic package allows thousands of power cycles and/or temperature cycles between ?55° C. to 300° C. The present invention can also tolerate continuous operation at 300° C., due to high thermal conductivity which pulls heat away from the chip. The electronic package can be designed to house a plurality of interconnecting chips within the package. The internal dielectric is able to withstand high voltages, such as 1200 volts, and possibly up to 20,000 volts. Additionally, the package is designed to have a low switching inductance by eliminating wire bonds. By eliminating the wire bonds, the electronic package is able to withstand an injection mold.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: October 14, 2008
    Assignee: Microsemi Corporation
    Inventors: Tracy Autry, Steven G. Kelly
  • Publication number: 20080237827
    Abstract: A microelectronic device including a microelectronic circuit and at least one planar flexible lead. These planar flexible leads are adapted to bend and flex during mechanical stress allow direct mounting of the device to a member, and withstand extreme thermal cycling, such as ?197° C. to +150° C. such as encountered in space.
    Type: Application
    Filed: March 27, 2007
    Publication date: October 2, 2008
    Inventor: Tracy Autry
  • Publication number: 20080105958
    Abstract: An electronic package designed to package silicon carbide discrete components for silicon carbide chips. The electronic package allows thousands of power cycles and/or temperature cycles between ?55° C. to 300° C. The present invention can also tolerate continuous operation at 300° C., due to high thermal conductivity which pulls heat away from the chip. The electronic package can be designed to house a plurality of interconnecting chips within the package. The internal dielectric is able to withstand high voltages, such as 1200 volts, and possibly up to 20,000 volts. Additionally, the package is designed to have a low switching inductance by eliminating wire bonds. By eliminating the wire bonds, the electronic package is able to withstand an injection mold.
    Type: Application
    Filed: October 9, 2007
    Publication date: May 8, 2008
    Inventors: Tracy Autry, Steven Kelly
  • Publication number: 20080079126
    Abstract: A low profile, 1 or 2 die design, surface mount high power microelectronic package with coefficient of expansion (CTE) matched materials such as Silicon die to Molybdenum conductor (bond pads). The CTE matching of the materials in the package enables the device to withstand repeated, extreme temperature range cycling without failing or cracking. The package can be used for transient voltage suppression (TVS), Schottky diode, rectifier diode, or high voltage diodes, among other uses. The use of a heat sink metal conductor that has a very high modulus of elasticity allows for a very thin wall plastic locking to be utilized in order to minimize the footprint of the package.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Tracy Autry, Stephen G. Kelly, George A. Digiacomo, Christopher Alan Barnes
  • Patent number: 6294766
    Abstract: A battery cell bypass protection technology for use with NiH2 (or other energy storage) cells on a spacecraft or other high reliability application. The device is a thermally activated switch, designed to bypass the current around a failed (open) or failing cell so that the other cells in the battery are unaffected. One unique aspect of the design is a “pre-loaded” compression action, solder shorting mechanism. Another unique aspect is that the construction employs series redundant heaters and blocking diodes in multi-chip packages. These unique aspects provide consistent and complete shorting to provide a low-resistance cell bypass in any orientation on earth (1g) or in orbit (0g). Another unique aspect is the use of non-lead-based solder that minimizes “creep” over time and temperature.
    Type: Grant
    Filed: July 31, 1999
    Date of Patent: September 25, 2001
    Assignee: Microsemi Corporation
    Inventors: Tracy A. Autry, Fernando C. Lynch, Don Mathes
  • Patent number: 5923083
    Abstract: A hermetic packaging technology for silicon Schottky die or any other two terminal solderable die. The technology uses a pressed ceramic frame, solid metal pads, a solid metal disc, metal seal rings, and a direct high temperature solder bond to the die. There are no intermediate straps or wires used to connect the die to the metal pads. The die is actually part of the final package, or it can be said that the package is built around the die. The device is hermetically sealed for use in high reliability applications such as military or space programs. All materials used in the technology are matched for coefficient of thermal expansion (CTE).
    Type: Grant
    Filed: March 1, 1997
    Date of Patent: July 13, 1999
    Assignee: Microsemi Corporation
    Inventors: Tracy Autry, Fernando Lynch, Dan Tulbure
  • Patent number: 5821617
    Abstract: A surface mount package for use with large area silicon device. The package uses a pressed ceramic frame and solid metal pads which are closely matched for coefficient of thermal expansion (CTE) to each other and to the silicon die. The package is specifically designed for large area die (greater than 0.0625 inches squared) and for high temperature eutectic alloy bonding. All materials of the package are CTE matched to each other and to silicon within 10%.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: October 13, 1998
    Assignee: Microsemi Corporation
    Inventors: Tracy Autry, Fernando Lynch, Dan Tulbure