Patents by Inventor Tracy Reynolds
Tracy Reynolds has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9987353Abstract: The present invention relates to the discovery of compositions and methods for therapeutic immunization for treatment of chronic hepatitis B. Methods of the invention include a method generating an evolved high titer hybrid-hepatitis B virus (HBV) vector, methods of treating and/or preventing HBV, and methods of inducing a memory T and B cell immune response against HBV infection in a subject administered the VLV composition produced thereby. Furthermore, the invention encompasses a pharmaceutical composition for vaccinating a subject to protect the subject against infection with HBV.Type: GrantFiled: May 11, 2015Date of Patent: June 5, 2018Assignee: Yale UniversityInventors: Michael Robek, John Rose, Tracy Reynolds
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Publication number: 20170056493Abstract: The present invention relates to the discovery of compositions and methods for therapeutic immunization for treatment of chronic hepatitis B. Methods of the invention include a method generating an evolved high titer hybrid-hepatitis B virus (HBV) vector, methods of treating and/or preventing HBV, and methods of inducing a memory T and B cell immune response against HBV infection in a subject administered the VLV composition produced thereby. Furthermore, the invention encompasses a pharmaceutical composition for vaccinating a subject to protect the subject against infection with HBV.Type: ApplicationFiled: May 11, 2015Publication date: March 2, 2017Applicant: YALE UNIVERSITYInventors: Michael ROBEK, John ROSE, Tracy REYNOLDS
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Publication number: 20060166404Abstract: A rerouting element for a semiconductor device includes a substantially planar member that carries at least one contact location, at least one conductive, at least one rerouted bond pad. The contact location is positioned adjacent to a first periphered edge of the substantially planar member and at a location that corresponds to the location of a bond pad of a semiconductor device with which the rerouting element is to be used. The at least one conductive element, which communicates with the at least one contact location, reroutes the bond pad location of the semiconductor device to a corresponding rerouted bond pad location adjacent to a second one peripheral edge of the rerouted substantially planar member which is opposite the first periphered edge. In addition, assemblies including rerouting elements and methods for designing and using rerouting elements are disclosed.Type: ApplicationFiled: February 13, 2006Publication date: July 27, 2006Inventors: David Corisis, Jerry Brooks, Matt Schwab, Tracy Reynolds
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Publication number: 20060121650Abstract: A method used to form a semiconductor device comprises providing first and second circuit portions having first and second pad portions respectively. The second circuit portion is electrically isolated from the first circuit portion. The first and second pad portions are then electrically connected, for example with a ball bond or a wire bond, to electrically couple the first and second circuit portions. In various embodiments the semiconductor device will not function until the pad portions are electrically coupled, and in other embodiments the functionality of the device may be selectively controlled by connecting selected pad portions from a plurality of pad portions. Isolating the first and second circuit portions allows electrical operations such as antifuse programming to be carried out without adversely affecting related circuits. Once electrical operations are completed, the isolated circuit portions are electrically coupled to provide a complete circuit.Type: ApplicationFiled: January 31, 2006Publication date: June 8, 2006Inventors: Rich Fogal, Tracy Reynolds, Timothy Cowles
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Publication number: 20060113650Abstract: A rerouting element for a semiconductor device includes a dielectric film that carries conductive vias, conductive elements, and contact pads. The conductive vias are positioned at locations that correspond to the locations of bond pads of a semiconductor device with which the rerouting element is to be used. The conductive elements, which communicate with corresponding conductive vias, reroute the bond pad locations to corresponding contact pad locations adjacent to one peripheral edge or two adjacent peripheral edges of the rerouted semiconductor device. The rerouting element is particularly useful for rerouting centrally located bond pads of a semiconductor device, as well as for rerouting the peripheral locations of bond pads of a semiconductor device to one or two adjacent peripheral edges thereof. In addition, methods for designing and using rerouting elements are disclosed.Type: ApplicationFiled: January 4, 2006Publication date: June 1, 2006Inventors: David Corisis, Jerry Brooks, Matt Schwab, Tracy Reynolds
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Patent number: 6991970Abstract: A method used to form a semiconductor device comprises providing first and second circuit portions having first and second pad portions respectively. The second circuit portion is electrically isolated from the first circuit portion. The first and second pad portions are then electrically connected, for example with a ball bond or a wire bond, to electrically couple the first and second circuit portions. In various embodiments the semiconductor device will not function until the pad portions are electrically coupled, and in other embodiments the functionality of the device may be selectively controlled by connecting selected pad portions from a plurality of pad portions. Isolating the first and second circuit portions allows electrical operations such as antifuse programming to be carried out without adversely affecting related circuits. Once electrical operations are completed, the isolated circuit portions are electrically coupled to provide a complete circuit.Type: GrantFiled: August 30, 2001Date of Patent: January 31, 2006Assignee: Micron Technology, Inc.Inventors: Rich Fogal, Tracy Reynolds, Timothy Cowles
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Publication number: 20050156293Abstract: A routing element for use in a semiconductor device assembly includes a substrate that carries conductive traces that provide either additional electrical paths or shorter electrical paths than those provided by a carrier substrate of the semiconductor device assembly. The conductive traces may be carried upon a single surface of the routing element substrate, be carried internally by the routing element substrate, or include externally and internally carried portions. The routing element may also include a contact pad positioned at each end of each conductive trace thereof to facilitate electrical connection of each conductive trace to a corresponding terminal of the substrate or to a corresponding bond pad of a semiconductor device of the multichip module. Multichip modules are also disclosed, as are methods for designing the routing element and methods in which the routing element is used.Type: ApplicationFiled: March 15, 2005Publication date: July 21, 2005Inventors: David Corisis, Jerry Brooks, Matt Schwab, Tracy Reynolds
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Publication number: 20050156295Abstract: A routing element for use in a semiconductor device assembly includes a substrate that carries conductive traces that provide either additional electrical paths or shorter electrical paths than those provided by a carrier substrate of the semiconductor device assembly. The conductive traces may be carried upon a single surface of the routing element substrate, be carried internally by the routing element substrate, or include externally and internally carried portions. The routing element may also include a contact pad positioned at each end of each conductive trace thereof to facilitate electrical connection of each conductive trace to a corresponding terminal of the substrate or to a corresponding bond pad of a semiconductor device of the multichip module. Multichip modules are also disclosed, as are methods for designing the routing element and methods in which the routing element is used.Type: ApplicationFiled: March 10, 2005Publication date: July 21, 2005Inventors: David Corisis, Jerry Brooks, Matt Schwab, Tracy Reynolds
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Patent number: 6858453Abstract: An integrated circuit is provided having an alignment feature integral with the lead frame. The integrated circuit includes a lead frame coupled with a semiconductor die, and is partially encapsulated in insulating material. The lead frame has the alignment feature therein. The alignment feature includes a cut out on the lead frame taking the form of a semicircle, protuberance, apertures, or slots. Alternatively, the alignment feature includes a removably coupled tab. After testing of the integrated circuit has been completed, the alignment tab is removed from the integrated circuit. The alignment feature can also be provided on a heat spreader which is attached to a side of or within the lead frame package.Type: GrantFiled: October 12, 1999Date of Patent: February 22, 2005Assignee: Micron Technology, Inc.Inventors: David J. Corisis, Tracy Reynolds, Michael Slaughter, Daniel Cram, Leland R. Nevill
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Patent number: 6836003Abstract: An integrated circuit is provided having an alignment feature integral with the lead frame. The integrated circuit includes a lead frame coupled with a semiconductor die, and is partially encapsulated in insulating material. The lead frame has the alignment feature therein. The alignment feature includes a cut out on the lead frame taking the form of a semicircle, protuberance, apertures, or slots. Alternatively, the alignment feature includes a removably coupled tab. After testing of the integrated circuit has been completed, the alignment tab is removed from the integrated circuit. The alignment feature can also be provided on a heat spreader which is attached to a side of or within the lead frame package.Type: GrantFiled: March 28, 2001Date of Patent: December 28, 2004Assignee: Micron Technology, Inc.Inventors: David J. Corisis, Tracy Reynolds, Michael Slaughter, Daniel Cram, Leland R. Nevill, Jerrold L. King
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Publication number: 20030045026Abstract: A method used to form a semiconductor device comprises providing first and second circuit portions having first and second pad portions respectively. The second circuit portion is electrically isolated from the first circuit portion. The first and second pad portions are then electrically connected, for example with a ball bond or a wire bond, to electrically couple the first and second circuit portions. In various embodiments the semiconductor device will not function until the pad portions are electrically coupled, and in other embodiments the functionality of the device may be selectively controlled by connecting selected pad portions from a plurality of pad portions. Isolating the first and second circuit portions allows electrical operations such as antifuse programming to be carried out without adversely affecting related circuits. Once electrical operations are completed, the isolated circuit portions are electrically coupled to provide a complete circuit.Type: ApplicationFiled: August 30, 2001Publication date: March 6, 2003Inventors: Rich Fogal, Tracy Reynolds, Timothy Cowles
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Patent number: 6509205Abstract: The present invention is directed toward an apparatus and method for providing mechanically pre-formed conductive leads. In one embodiment of the invention, an apparatus includes a forming chuck engageable with a first surface of a conductive sheet, and a receiving chuck engageable with a second surface of the conductive sheet opposite from the forming chuck. The forming chuck has a raised forming portion alignable with one or more lead members formed in the conductive sheet, and the receiving chuck has a receiving portion alignable with the forming portion and shaped to closely conform to at least part of the forming portion. The conductive sheet is compressed between the forming chuck and the receiving chuck to mechanically pre-form the one or more lead members into one or more pre-formed conductive leads. In one embodiment, the raised forming portion includes a ridge having a polygonal cross-sectional shape and the receiving portion comprises a channel.Type: GrantFiled: April 3, 2001Date of Patent: January 21, 2003Assignee: Micron Technology, Inc.Inventors: Ronald W. Ellis, Tracy Reynolds, Michael Bettinger
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Patent number: 6504257Abstract: The present invention is directed toward an apparatus and method for providing mechanically pre-formed conductive leads. In one embodiment of the invention, an apparatus includes a forming chuck engageable with a first surface of a conductive sheet, and a receiving chuck engageable with a second surface of the conductive sheet opposite from the forming chuck. The forming chuck has a raised forming portion alignable with one or more lead members formed in the conductive sheet, and the receiving chuck has a receiving portion alignable with the forming portion and shaped to closely conform to at least part of the forming portion. The conductive sheet is compressed between the forming chuck and the receiving chuck to mechanically pre-form the one or more lead members into one or more pre-formed conductive leads. In one embodiment, the raised forming portion includes a ridge having a polygonal cross-sectional shape and the receiving portion comprises a channel.Type: GrantFiled: November 21, 2000Date of Patent: January 7, 2003Assignee: Micron Technology, Inc.Inventors: Ronald W. Ellis, Tracy Reynolds, Michael Bettinger
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Patent number: 6474532Abstract: The invention encompasses a method of forming a semiconductor chip assembly. A substrate is provided. Such substrate has a pair of opposing surfaces and circuitry formed on one of the opposing surfaces. A semiconductor chip is joined to the substrate. The semiconductor chip has bonding regions thereon. A plurality of wires join to the circuitry and extend over the bonding regions of the semiconductor chip. The wires are pressed down to about the bonding regions of the semiconductor chip with a tool. The tool is lifted from the wires, and subsequently the wires are adhered to the bonding regions of the semiconductor chip. The invention also encompasses an apparatus for forming wire bonds from circuitry on a substrate to a semiconductor chip joined to the substrate. Such apparatus comprises a support for supporting the substrate and the semiconductor chip.Type: GrantFiled: March 2, 2001Date of Patent: November 5, 2002Assignee: Micron Technology, Inc.Inventors: Michael Bettinger, Ronald W. Ellis, Tracy Reynolds
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Patent number: 6454153Abstract: The invention encompasses a method of forming a semiconductor chip assembly. A substrate is provided. Such substrate has a pair of opposing surfaces and circuitry formed on one of the opposing surfaces. A semiconductor chip is joined to the substrate. The semiconductor chip has bonding regions thereon. A plurality of wires join to the circuitry and extend over the bonding regions of the semiconductor chip. The wires are pressed down to about the bonding regions of the semiconductor chip with a tool. The tool is lifted from the wires, and subsequently the wires are adhered to the bonding regions of the semiconductor chip. The invention also encompasses an apparatus for forming wire bonds from circuitry on a substrate to a semiconductor chip joined to the substrate. Such apparatus comprises a support for supporting the substrate and the semiconductor chip.Type: GrantFiled: March 2, 2001Date of Patent: September 24, 2002Assignee: Micron Technology, Inc.Inventors: Michael Bettinger, Ronald W. Ellis, Tracy Reynolds
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Patent number: 6357275Abstract: The present invention is directed toward an apparatus and method for providing mechanically pre-formed conductive leads. In one embodiment of the invention, an apparatus includes a forming chuck engageable with a first surface of a conductive sheet, and a receiving chuck engageable with a second surface of the conductive sheet opposite from the forming chuck. The forming chuck has a raised forming portion alignable with one or more lead members formed in the conductive sheet, and the receiving chuck has a receiving portion alignable with the forming portion and shaped to closely conform to at least part of the forming portion. The conductive sheet is compressed between the forming chuck and the receiving chuck to mechanically pre-form the one or more lead members into one or more pre-formed conductive leads. In one embodiment, the raised forming portion includes a ridge having a polygonal cross-sectional shape and the receiving portion comprises a channel.Type: GrantFiled: November 21, 2000Date of Patent: March 19, 2002Assignee: Micron Technology, Inc.Inventors: Ronald W. Ellis, Tracy Reynolds, Michael Bettinger
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Publication number: 20010035451Abstract: The invention encompasses a method of forming a semiconductor chip assembly. A substrate is provided. Such substrate has a pair of opposing surfaces and circuitry formed on one of the opposing surfaces. A semiconductor chip is joined to the substrate. The semiconductor chip has bonding regions thereon. A plurality of wires join to the circuitry and extend over the bonding regions of the semiconductor chip. The wires are pressed down to about the bonding regions of the semiconductor chip with a tool. The tool is lifted from the wires, and subsequently the wires are adhered to the bonding regions of the semiconductor chip. The invention also encompasses an apparatus for forming wire bonds from circuitry on a substrate to a semiconductor chip joined to the substrate. Such apparatus comprises a support for supporting the substrate and the semiconductor chip.Type: ApplicationFiled: March 2, 2001Publication date: November 1, 2001Inventors: Michael Bettinger, Ronald W. Ellis, Tracy Reynolds
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Publication number: 20010011762Abstract: An integrated circuit is provided having an alignment feature integral with the lead frame. The integrated circuit includes a lead frame coupled with a semiconductor die, and is partially encapsulated in insulating material. The lead frame has the alignment feature therein. The alignment feature includes a cut out on the lead frame taking the form of a semi-circle, protuberance, apertures, or slots. Alternatively, the alignment feature includes a removably coupled tab. After testing of the integrated circuit has been completed, the alignment tab is removed from the integrated circuit. The alignment feature can also be provided on a heat spreader which is attached to a side of or within the lead frame package.Type: ApplicationFiled: March 28, 2001Publication date: August 9, 2001Inventors: David J. Corisis, Tracy Reynolds, Michael Slaughter, Daniel Cram, Leland R. Nevill, Jerrold L. King
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Publication number: 20010010944Abstract: The present invention is directed toward an apparatus and method for providing mechanically pre-formed conductive leads. In one embodiment of the invention, an apparatus includes a forming chuck engageable with a first surface of a conductive sheet, and a receiving chuck engageable with a second surface of the conductive sheet opposite from the forming chuck. The forming chuck has a raised forming portion alignable with one or more lead members formed in the conductive sheet, and the receiving chuck has a receiving portion alignable with the forming portion and shaped to closely conform to at least part of the forming portion. The conductive sheet is compressed between the forming chuck and the receiving chuck to mechanically pre-form the one or more lead members into one or more pre-formed conductive leads. In one embodiment, the raised forming portion includes a ridge having a polygonal cross-sectional shape and the receiving portion comprises a channel.Type: ApplicationFiled: April 3, 2001Publication date: August 2, 2001Inventors: Ronald W. Ellis, Tracy Reynolds, Michael Bettinger
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Publication number: 20010008247Abstract: The invention encompasses a method of forming a semiconductor chip assembly. A substrate is provided. Such substrate has a pair of opposing surfaces and circuitry formed on one of the opposing surfaces. A semiconductor chip is joined to the substrate. The semiconductor chip has bonding regions thereon. A plurality of wires join to the circuitry and extend over the bonding regions of the semiconductor chip. The wires are pressed down to about the bonding regions of the semiconductor chip with a tool. The tool is lifted from the wires, and subsequently the wires are adhered to the bonding regions of the semiconductor chip. The invention also encompasses an apparatus for forming wire bonds from circuitry on a substrate to a semiconductor chip joined to the substrate. Such apparatus comprises a support for supporting the substrate and the semiconductor chip.Type: ApplicationFiled: March 2, 2001Publication date: July 19, 2001Inventors: Michael Bettinger, Ronald W. Ellis, Tracy Reynolds